DAC38RF82

• 14-Bit resolution, 9-GSPS DAC with multimode operation
  • 16-Bit, Dual-channel data mode
    • Max input rate: 2.5-GSPS
    • Wideband digital up-converter
      • Interpolation: 1,2,4,6,8,10,12,16,18,20,24x
  • 12-Bit, Dual-channel data mode
    • Max input rate: 3.33-GSPS
    • Wideband digital Up-converter
      • Interpolation: 1,2,24x
  • 8-Bit, Single-channel data mode
    • Max input rate: 9-GSPS
• JESD204B interface
  • Subclass 1 for multichip synchronization
  • DAC38RF89: Maximum lane rate: 12.5 Gbps
  • DAC38RF82: Maximum lane rate: 12.8 Gbps
• Differential output
  • Supports DC coupling
  • RF Full-scale output power (with 2:1 balun):
    3 dBm at 2.14 GHz
• Internal PLL and VCO with bypass
  • DAC38RF82: f_C(VCO) = 5.9 or 8.9 GHz
  • DAC38RF89: f_C(VCO) = 5 or 7.5 GHz
• Power supplies: -1.8 V, 1.0 V, 1.8 V
• Package: 10 x 10 mm BGA, 0.8 mm pitch,
  144-balls

The DAC38RF82 and DAC38RF89 are high performance, wide bandwidth RF-sampling digital-to-analog (DACs) that are capable of dual channel input data rate up to 3.33 GSPS or single-channel operation with 8-bits up to 9-GSPS. The devices have a low power JESD204B Interface with up to 8 lanes, with a maximum bit rate of 12.5 Gbps (DAC38RF89) and 12.8 Gbps (DAC38RF82).

In dual channel operation, the input interface is capable of data rates up to 3.33 GSPS at 12-bits and 2.5 GSPS at 16-bits resolution without interpolation. When used as a complex baseband transmitter with interpolation modes from 2x to 24x, the DAC38RF82 or DAC38RF89 is capable of synthesizing wideband signals up to 2 GHz bandwidth with 16-bit input resolution and 2.66 GHz bandwidth with 12-bit input resolution.

The 8-bit mode allows an input at the full 9 GSPS maximum DAC sample rate and can synthesize wideband signals from 0 to 4.5 GHz.

An optional low jitter PLL/VCO simplifies the DAC clock generation by allowing use of a lower frequency reference clock. DAC38RF82 and DAC38RF89 support different VCO frequency ranges, summarized in Device Comparison Table.