Product details

Resolution (Bits) 14 Sample/update rate (MSPS) 9000 Number of DAC channels (#) 2 Interpolation 10x, 12x, 16x, 18x, 1x, 20x, 24x, 2x, 4x, 6x, 8x Output Differential Power consumption (Typ) (mW) 3800 Operating temperature range (C) -40 to 85
Resolution (Bits) 14 Sample/update rate (MSPS) 9000 Number of DAC channels (#) 2 Interpolation 10x, 12x, 16x, 18x, 1x, 20x, 24x, 2x, 4x, 6x, 8x Output Differential Power consumption (Typ) (mW) 3800 Operating temperature range (C) -40 to 85
FCBGA (AAV) 144 100 mm² 10 x 10
  • 14-Bit resolution, 9-GSPS DAC with multimode operation
    • 16-Bit, Dual-channel data mode
      • Max input rate: 2.5-GSPS
      • Wideband digital up-converter
        • Interpolation: 1,2,4,6,8,10,12,16,18,20,24x
    • 12-Bit, Dual-channel data mode
      • Max input rate: 3.33-GSPS
      • Wideband digital Up-converter
        • Interpolation: 1,2,24x
    • 8-Bit, Single-channel data mode
      • Max input rate: 9-GSPS
  • JESD204B interface
    • Subclass 1 for multichip synchronization
    • DAC38RF89: Maximum lane rate: 12.5 Gbps
    • DAC38RF82: Maximum lane rate: 12.8 Gbps
  • Differential output
    • Supports DC coupling
    • RF Full-scale output power (with 2:1 balun):
      3 dBm at 2.14 GHz
  • Internal PLL and VCO with bypass
    • DAC38RF82: fC(VCO) = 5.9 or 8.9 GHz
    • DAC38RF89: fC(VCO) = 5 or 7.5 GHz
  • Power supplies: -1.8 V, 1.0 V, 1.8 V
  • Package: 10 x 10 mm BGA, 0.8 mm pitch,
    144-balls
  • 14-Bit resolution, 9-GSPS DAC with multimode operation
    • 16-Bit, Dual-channel data mode
      • Max input rate: 2.5-GSPS
      • Wideband digital up-converter
        • Interpolation: 1,2,4,6,8,10,12,16,18,20,24x
    • 12-Bit, Dual-channel data mode
      • Max input rate: 3.33-GSPS
      • Wideband digital Up-converter
        • Interpolation: 1,2,24x
    • 8-Bit, Single-channel data mode
      • Max input rate: 9-GSPS
  • JESD204B interface
    • Subclass 1 for multichip synchronization
    • DAC38RF89: Maximum lane rate: 12.5 Gbps
    • DAC38RF82: Maximum lane rate: 12.8 Gbps
  • Differential output
    • Supports DC coupling
    • RF Full-scale output power (with 2:1 balun):
      3 dBm at 2.14 GHz
  • Internal PLL and VCO with bypass
    • DAC38RF82: fC(VCO) = 5.9 or 8.9 GHz
    • DAC38RF89: fC(VCO) = 5 or 7.5 GHz
  • Power supplies: -1.8 V, 1.0 V, 1.8 V
  • Package: 10 x 10 mm BGA, 0.8 mm pitch,
    144-balls

The DAC38RF82 and DAC38RF89 are high performance, wide bandwidth RF-sampling digital-to-analog (DACs) that are capable of dual channel input data rate up to 3.33 GSPS or single-channel operation with 8-bits up to 9-GSPS. The devices have a low power JESD204B Interface with up to 8 lanes, with a maximum bit rate of 12.5 Gbps (DAC38RF89) and 12.8 Gbps (DAC38RF82).

In dual channel operation, the input interface is capable of data rates up to 3.33 GSPS at 12-bits and 2.5 GSPS at 16-bits resolution without interpolation. When used as a complex baseband transmitter with interpolation modes from 2x to 24x, the DAC38RF82 or DAC38RF89 is capable of synthesizing wideband signals up to 2 GHz bandwidth with 16-bit input resolution and 2.66 GHz bandwidth with 12-bit input resolution.

The 8-bit mode allows an input at the full 9 GSPS maximum DAC sample rate and can synthesize wideband signals from 0 to 4.5 GHz.

An optional low jitter PLL/VCO simplifies the DAC clock generation by allowing use of a lower frequency reference clock. DAC38RF82 and DAC38RF89 support different VCO frequency ranges, summarized in Device Comparison Table.

The DAC38RF82 and DAC38RF89 are high performance, wide bandwidth RF-sampling digital-to-analog (DACs) that are capable of dual channel input data rate up to 3.33 GSPS or single-channel operation with 8-bits up to 9-GSPS. The devices have a low power JESD204B Interface with up to 8 lanes, with a maximum bit rate of 12.5 Gbps (DAC38RF89) and 12.8 Gbps (DAC38RF82).

In dual channel operation, the input interface is capable of data rates up to 3.33 GSPS at 12-bits and 2.5 GSPS at 16-bits resolution without interpolation. When used as a complex baseband transmitter with interpolation modes from 2x to 24x, the DAC38RF82 or DAC38RF89 is capable of synthesizing wideband signals up to 2 GHz bandwidth with 16-bit input resolution and 2.66 GHz bandwidth with 12-bit input resolution.

The 8-bit mode allows an input at the full 9 GSPS maximum DAC sample rate and can synthesize wideband signals from 0 to 4.5 GHz.

An optional low jitter PLL/VCO simplifies the DAC clock generation by allowing use of a lower frequency reference clock. DAC38RF82 and DAC38RF89 support different VCO frequency ranges, summarized in Device Comparison Table.

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Technical documentation

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

DAC38RF82EVM — DAC38RF82 Dual-Channel, 14-Bit, 9-GSPS, 1x-24x Interpolating, 6 & 9 GHz PLL DAC Evaluation Module

The DAC38RF82EVM is the circuit board for evaluating DAC38RF82/83/85/93 digital to analog converters (DACs). The EVM can be used to evaluate the performance of the DAC up to 9GSPS sampling rate and it is designed to work with the TSW14J56 EVM. The available FMC connector also makes it possible to (...)
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Limit: 3
Evaluation board

TSW40RF82EVM — 2T2R RF-Sampling Transceiver w/ Dual 14-Bit 3GSPS ADC/9GSPS DAC Clocking Solution Evaluation Module

The TSW40RF82 evaluation module (EVM) is a two-transmit two-receive (2T2R) RF-sampling transceiver reference design. The module contains the DAC38RF82 dual-channel RF-sampling digital-to-analog converter (DAC) and the ADC32RF45 dual-channel RF-sampling analog-to-digital converter (ADC).

The (...)

In stock
Limit: 3
Firmware

TI-JESD204-IP — JESD204 Rapid Design IP for FPGAs connected to TI high-speed data converters

The JESD204 rapid design IP has been designed to enable FPGA engineers to achieve an accelerated path to a working JESD204 system. The IP has been architected in a way that downstream digital processing and other application logic are isolated from most of the performance- and timing-critical (...)
Firmware

Arria10 + DAC38RF82 Design Firmware (Rev. A)

SLAC771A.ZIP (10836 KB)
Firmware

DAC38RF8x KCU105 Firmware (Rev. A)

SLAC779A.ZIP (48623 KB)
GUI for evaluation module (EVM)

DAC38RF8x EVM GUI (Rev. D)

SLAC722D.ZIP (216778 KB)
Support software

DATACONVERTERPRO-SW — High-speed data converter pro software

This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter and analog front-end (AFE) platforms. Designed to support the entire TSW14xxx series of data-capture and pattern-generation cards, (...)
Simulation model

DAC38RF80 IBIS Model

SLAM304.ZIP (70 KB) - IBIS Model
Simulation model

DAC38RF8x IBIS-AMI Model

SLAM343.ZIP (24819 KB) - IBIS-AMI Model
Schematic

DAC38RF8xEVM Design Files

SLAC734.ZIP (10565 KB)
Reference designs

TIDA-01215 — Power Supply Reference Design for Optimizing Spur and Phase Noise in RF-sampling DACs

This reference design provides an efficient power supply scheme to power-up the RF-sampling DAC38RF8x digital-to-analog data converter (DAC) without sacrificing performance and also reduces board area and BOM. The reference design uses both DC/DC switchers and an LDO to power-up the DAC38RF8x (...)
Reference designs

TIDA-01435 — High-Bandwidth Zero-IF Reference Design for Microwave Backhaul

The TSW40RF82EVM reference design provides a platform to interface the DAC38RF82 with a high-performance modulator - the TRF370417EVM. The TRF370417EVM can modulate wideband signals at up to 6 GHz as would be typical for a microwave backhaul application. The TRF370417 device may be substituted for (...)
Package Pins Download
FCBGA (AAV) 144 View options

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  • Ongoing reliability monitoring

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