The DAC38RF82 (or DAC38RF89) has a 9-tap inverse Sinc filter (INVSINC) that runs at the DAC update rate (fDAC) that can be used to flatten the frequency response of the sample-and-hold output. The DAC sample-and-hold output sets the output current and holds it constant for one DAC clock cycle until the next sample, resulting in the well known sin(x)/x or Sinc(x) frequency response (Figure 43, red line). The inverse sinc filter response (Figure 43, blue line) has the opposite frequency response from 0 to 0.4 x fDAC, resulting in the combined response (Figure 43, green line). Between 0 to 0.4 x fDAC, the inverse sinc filter compensates the sample-and-hold roll-off with less than 0.03 dB error.
The inverse sinc filter has a gain > 1 at all frequencies. Therefore, the signal input to INVSINC must be reduced from full scale to prevent saturation in the filter. The amount of back-off required depends on the signal frequency, and is set such that at the signal frequencies the combination of the input signal and filter response is less than 1 (0 dB). For example, if the signal input to INVSINC is at 0.25 x fDAC, the response of INVSINC is 0.9 dB, and the signal must be backed off from full scale by 0.9 dB to avoid saturation. The advantage of INVSINC having a positive gain at all frequencies is that the user is then able to optimize the back-off of the signal based on its frequency.
The inverse sinc filters are enabled by field ISFIR_ENA in register MULTIDUC_CFG1 (8.5.13).