DLPS029F April 2013 – May 2019 DLPC350
PRODUCTION DATA.
PARAMETER(1) | MIN | MAX | UNIT | ||
---|---|---|---|---|---|
ƒclock | Clock frequency, P2_CLK (LVDS input clock) | 20 | 90 | MHz | |
tc | Cycle time, P2_CLK (LVDS input clock) | 11.1 | 50.0 | ns | |
tslew | Clock or data slew rate | ƒpxck < 90 MHz | 0.3 | V/ns | |
ƒpxck > 90 MHz | 0.5 | ||||
tstartup | Link startup time (internal) | 1 | ms |