SNLS543 August 2018 DS90UH949A-Q1
The Bidirectional Control Channel in the FPD-Link III devices implements I2C-compatible bus arbitration in the proxy I2C master implementation. When sending a data bit, each I2C master senses the value on the SDA line. If the master is sending a logic 1 but senses a logic 0, the master has lost arbitration. It will stop driving SDA and retry the transaction when the bus becomes idle. Thus, multiple I2C masters may be implemented in the system.
Ensure that all I2C masters on the bus support multi-master arbitration.
Assign I2C addresses with more than a single bit set to 1 for all devices on the I2C bus. 0x6A, 0x7B, and 0x37 are examples of good choices for an I2C address. 0x40 and 0x20 are examples of bad choices for an I2C address.
If the system does require master-slave operation in both directions across the BCC, some method of communication must be used to ensure only one direction of operation occurs at any time. The communication method could include using available read/write registers in the deserializer to allow masters to communicate with each other to pass control between the two masters. An example would be to use register 0x18 or 0x19 in the deserializer as a mailbox register to pass control of the channel from one master to another.