SBOS062D September   2000  – December 2025 INA126 , INA2126

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information: INA126
    5. 5.5 Thermal Information: INA2126
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
      1. 6.4.1 Single-Supply Operation
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Setting the Gain
        2. 7.2.2.2 Offset Trimming
        3. 7.2.2.3 Input Bias Current Return
        4. 7.2.2.4 Input Common-Mode Range
        5. 7.2.2.5 Input Protection
        6. 7.2.2.6 Channel Crosstalk—Dual Version
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Low-Voltage Operation
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)

5.7 Typical Characteristics

at TA = 25°C, VS = ±15V, all chips site origins (CSO), unless otherwise noted

INA126 INA2126 Gain vs Frequency
CSO: SHE
Figure 5-1 Gain vs Frequency
INA126 INA2126 Common-Mode Rejection vs FrequencyFigure 5-3 Common-Mode Rejection vs Frequency
INA126 INA2126 Negative Power Supply Rejection vs Frequency
Figure 5-5 Negative Power Supply Rejection vs Frequency
INA126 INA2126 Input Common-Mode Voltage Range vs Output Voltage
VS = ±5V
Figure 5-7 Input Common-Mode Voltage Range
vs Output Voltage
INA126 INA2126 Input-Referred Noise vs Frequency
CSO: TID
Figure 5-9 Input-Referred Noise vs Frequency
INA126 INA2126 Input-Referred Offset Voltage Warmup
CSO: SHE
Figure 5-11 Input-Referred Offset Voltage Warmup
INA126 INA2126 Quiescent Current vs TemperatureFigure 5-13 Quiescent Current vs Temperature
INA126 INA2126 Total Harmonic Distortion + Noise vs Frequency
CSO: SHE
Figure 5-15 Total Harmonic Distortion + Noise vs Frequency
INA126 INA2126 Output Voltage Swing vs Output Current
Figure 5-17 Output Voltage Swing vs Output Current
INA126 INA2126 Small-Signal Response
G = 100
Figure 5-19 Small-Signal Response
INA126 INA2126 0.1Hz to 10Hz Voltage NoiseFigure 5-21 0.1Hz to 10Hz Voltage Noise
INA126 INA2126 Gain vs Frequency
CSO: TID
Figure 5-2 Gain vs Frequency
INA126 INA2126 Positive Power Supply Rejection vs FrequencyFigure 5-4 Positive Power Supply Rejection vs Frequency
INA126 INA2126 Input Common-Mode Voltage Range vs Output Voltage
 VS = ±15V
Figure 5-6 Input Common-Mode Voltage Range
vs Output Voltage
INA126 INA2126 Input-Referred Noise vs Frequency
CSO: SHE
Figure 5-8 Input-Referred Noise vs Frequency
INA126 INA2126 Settling Time vs Gain
Figure 5-10 Settling Time vs Gain
INA126 INA2126 Input-Referred Offset Voltage Warmup
CSO: TID
Figure 5-12 Input-Referred Offset Voltage Warmup
INA126 INA2126 Slew Rate vs TemperatureFigure 5-14 Slew Rate vs Temperature
INA126 INA2126 Total Harmonic Distortion + Noise vs Frequency
CSO: TID
Figure 5-16 Total Harmonic Distortion + Noise vs Frequency
INA126 INA2126 Small-Signal Response
G = 5
Figure 5-18 Small-Signal Response
INA126 INA2126 Large-Signal Response
G = 5
Figure 5-20 Large-Signal Response
INA126 INA2126 Channel Separation vs Frequency, RTI (Dual Version)Figure 5-22 Channel Separation vs Frequency, RTI (Dual Version)