SBOS062D September   2000  – December 2025 INA126 , INA2126

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information: INA126
    5. 5.5 Thermal Information: INA2126
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
      1. 6.4.1 Single-Supply Operation
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Setting the Gain
        2. 7.2.2.2 Offset Trimming
        3. 7.2.2.3 Input Bias Current Return
        4. 7.2.2.4 Input Common-Mode Range
        5. 7.2.2.5 Input Protection
        6. 7.2.2.6 Channel Crosstalk—Dual Version
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Low-Voltage Operation
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Revision History

Changes from Revision C (December 2021) to Revision D (December 2025)

  • Added description of device flow information in the SpecificationsGo
  • Added all chips site origins (CSO) condition to the typical test conditions in the Electrical Characteristics Go
  • Added different fabrication process specifications for Input Impedance in the Electrical Characteristics Go
  • Added different fabrication process specifications for Voltage Noise in the Electrical Characteristics Go
  • Added different fabrication process specifications for Bandwidth, –3dB in the Electrical Characteristics Go
  • Added all chips site origins (CSO) condition to the typical test conditions in the Typical Characteristics Go
  • Added CSO: SHE flow information to Gain vs Frequency, Input-Referred Offset Voltage Warmup, and Total Harmonic Distortion + Noise Frequency curves in the Typical Characteristics Go
  • Added Input-Referred Noise vs Frequency curve for CSO: SHE flow in the Typical Characteristics Go
  • Added CSO: TID flow information to Input-Referred Noise vs Frequency curve in the Typical Characteristics Go
  • Added Gain vs Frequency, Input-Referred Offset Voltage Warmup, and Total Harmonic Distortion + Noise Frequency curves for CSO: TID flow in the Typical Characteristics Go
  • Added part number flow information table to the Device Nomenclature Go

Changes from Revision B (December 2015) to Revision C (December 2021)

  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo
  • Added dual supply specification to Absolute Maximum Ratings Go
  • Deleted redundant operating temperature and input common mode voltage specifications in Recommended Operating Conditions Go
  • Added dual supply and specified temperature specifications in Recommended Operating Conditions Go
  • Added proper signs for PSRR and input bias current specifications in Electrical Characteristics Go
  • Deleted VO = 0 V test condition of common-mode voltage specification in Electrical Characteristics Go
  • Changed common-mode voltage specification from ±11.25 V minimum, to –11.25 V minimum and 11.25 V maximum, in Electrical Characteristics Go
  • Changed minimum CMRR specification for INA126U/E, INA2126E from 83 dB to 80 dB in Electrical Characteristics Go
  • Added typical input bias current specification of ±10 nA for INA126PA/UA/EA and INA2126PA/UA/EA in Electrical Characteristics Go
  • Changed current noise specifications in Electrical Characteristics from 60 fA/√Hz to 160 fA/√Hz for f = 1 kHz, and from 2 pApp to 7.3 pApp for f = 0.1 Hz to 10 HzGo
  • Changed test condition for short-circuit current specification in Electrical Characteristics from "Short circuit to ground" to "Continuous to VS / 2" for clarityGo
  • Changed short-circuit current specification in Electrical Characteristics from +10/-5 mA to ±5 mAGo
  • Deleted redundant voltage range, operating temperature range, and specification temperature range specifications from Electrical Characteristics Go
  • Changed Figures 6-7, 6-10, 6-13, 6-14, 6-15, 6-16, 6-17 Go
  • Added Figure 6-11Go

Changes from Revision A (August 2005) to Revision B (December 2015)

  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information sectionGo