SNVS032E February   2000  – January 2016 LM2651

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Capacitor
        2. 8.2.2.2 Inductor
        3. 8.2.2.3 Output Capacitor
        4. 8.2.2.4 Boost Capacitor
        5. 8.2.2.5 Soft-Start Capacitor
        6. 8.2.2.6 R1 and R2 (Programming Output Voltage)
        7. 8.2.2.7 Compensation Components
        8. 8.2.2.8 External Schottky Diode
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

Layout is critical to reduce noises and ensure specified performance. The important guidelines are listed as follows:

  1. Minimize the parasitic inductance in the loop of input capacitors and the internal MOSFETs by connecting the input capacitors to VIN and PGND pins with short and wide traces. This is important because the rapidly switching current, together with wiring inductance can generate large voltage spikes that may result in noise problems.
  2. Minimize the trace from the center of the output resistor divider to the FB pin and keep it away from noise sources to avoid noise pickup. For applications requiring tight regulation at the output, TI recommends a dedicated sense trace (separated from the power trace) to connect the top of the resistor divider to the output.
  3. If the Schottky diode D1 is used, minimize the traces connecting D1 to SW and PGND pins.

10.2 Layout Example

LM2651 LayOut Image_LM2651.gif Figure 14. LM2651 Layout Recommendation