SLVSES8A October   2020  – December 2020 LM5127-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Device Enable (EN, VCC_HOLD)
      2. 8.3.2  Dual Input VCC Regulator (BIAS, VCCX, VCC)
      3. 8.3.3  Dual Input VDD Switch (VDD, VDDX)
      4. 8.3.4  Device Configuration and Light Load Switching Mode Selection (CFG/MODE)
      5. 8.3.5  Fixed or Adjustable Output Regulation Target (VOUT, FB)
      6. 8.3.6  Overvoltage Protection (VOUT, FB)
      7. 8.3.7  Power Good Indicator (PGOOD)
      8. 8.3.8  Programmable Switching Frequency (RT)
      9. 8.3.9  External Clock Synchronization (SYNC)
      10. 8.3.10 Programmable Spread Spectrum (DITHER)
      11. 8.3.11 Programmable Soft Start (SS)
      12. 8.3.12 Fast Re-start using VCC_HOLD (VCC_HOLD)
      13. 8.3.13 Transconductance Error Amplifier and PWM (COMP)
      14. 8.3.14 Current Sensing and Slope Compensation (CSA, CSB)
      15. 8.3.15 Constant Peak Current Limit (CSA, CSB)
      16. 8.3.16 Maximum Duty Cycle and Minimum Controllable On-time Limits (Boost)
      17. 8.3.17 Bypass Mode (Boost)
      18. 8.3.18 Minimum Controllable On-time and Minimum Controllable Off-time Limits (Buck)
      19. 8.3.19 Low Dropout Mode for Extended Minimum Input Voltage (Buck)
      20. 8.3.20 Programmable Hiccup Mode Overload Protection (RES)
      21. 8.3.21 MOSFET Drivers and Hiccup Mode Fault Protection (LO, HO, HB)
      22. 8.3.22 Battery Monitor (BMOUT, BMIN_FIX, BMIN_PRG)
      23. 8.3.23 Dual-phase Interleaved Configuration for High Current Supply (CFG)
      24. 8.3.24 Thermal Shutdown Protection
      25. 8.3.25 External VCCX Supply Reduces Power Dissipation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Status
        1. 8.4.1.1 Shutdown Mode
        2. 8.4.1.2 Configuration Mode
        3. 8.4.1.3 Active Mode
        4. 8.4.1.4 Sleep Mode
        5. 8.4.1.5 Deep Sleep Mode
          1. 8.4.1.5.1 Cutting Leakage Path in Deep Sleep Mode (DIS, SLEEP1, SENSE1)
        6. 8.4.1.6 VCC HOLD Mode
      2. 8.4.2 Light Load Switching Mode
        1. 8.4.2.1 Forced PWM (FPWM) Operation
        2. 8.4.2.2 Diode Emulation (DE) Operation (Connect RSS at SS)
        3. 8.4.2.3 Forced Diode Emulation Operation in FPWM Mode
        4. 8.4.2.4 Skip Mode Operation
      3. 8.4.3 LM5127 Cheat Sheet
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Recommended Power Tree Architecture
        2. 9.2.2.2 Application Ideas
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
      2. 12.1.2 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.3 System Examples

The BIAS and the SENSE1 pins should be connected to the output of the boost converter in this pre-boost + two single buck configuration.

GUID-5AA3BF28-F87A-4CFE-B9A8-EB091CB21A79-low.gifFigure 9-10 Pre-Boost + Two Single-phase Bucks Configuration

The BIAS and the SENSE1 pins should be connected to the output of the boost converter in this pre-boost + dual-phase buck configuration.

GUID-BED04B23-DE33-45F4-A293-E896029EA3C2-low.gifFigure 9-11 Pre-Boost + Dual-phase Buck Configuration

The BIAS pin should be connected to the input of the buck converter in this three single buck configuration.

GUID-1AA6772B-7340-4BD8-82CA-399501D35E1E-low.gifFigure 9-12 Three Single-phase Bucks + Battery Monitor Configuration

The BIAS pin should be connected to the input of the buck converter in this dual-phase buck + single buck configuration.

GUID-A9163C47-3D12-4287-9FB3-AAB15AE8820A-low.gifFigure 9-13 Dual-phase Buck + Single-phase Buck + Battery Monitor Configuration

The BIAS and the SENSE1 pins should be connected to the output of the boost converter in this configuration.

GUID-EAC82454-F8DB-4B3D-A399-4320C1E212C0-low.gifFigure 9-14 Two Single-phase Bucks in Parallel with Boost Configuration

The BIAS and the SENSE1 pins should be connected to the buck converter input. The SW1 pins should be connected to the PGND1 pin. HO1 pin can be left floating. The HB1 pin should be connected to the VCC pin in non-synchronous boost configuration.

GUID-91C57916-E605-4692-9E81-21793EF0DF4A-low.gifFigure 9-15 Two Single-phase Bucks + Non-Synchronous Post-Boost Configuration

The BIAS pin should be connected to the buck converter input. The SENSE1 and SW1 pins should be connected to the PGND1 pin. HO1 should be connected to the high-side MOSFET through an AC coupling capacitor. HB1 should be connected to VCC in this synchronous SEPIC configuration.

GUID-B90A73E3-6AEA-4C2B-B397-DFDF222E128F-low.gifFigure 9-16 Dual-phase Buck in Parallel with Synchronous SEPIC Configuration