SNVSBW1B December   2021  – October 2023 LM63460-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
    1. 6.1 Wettable Flanks
    2. 6.2 Pinout Design for Clearance and FMEA
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Characteristics
    7. 7.7 Systems Characteristics
    8. 7.8 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Input Voltage Range (VIN1, VIN2)
      2. 8.3.2  Output Voltage Setpoint (FB)
      3. 8.3.3  Precision Enable and Input Voltage UVLO (EN/SYNC)
      4. 8.3.4  Frequency Synchronization (EN/SYNC)
      5. 8.3.5  Clock Locking
      6. 8.3.6  Adjustable Switching Frequency (RT)
      7. 8.3.7  Power-Good Monitor (PGOOD)
      8. 8.3.8  Bias Supply Regulator (VCC, BIAS)
      9. 8.3.9  Bootstrap Voltage and UVLO (CBOOT)
      10. 8.3.10 Spread Spectrum
      11. 8.3.11 Soft Start and Recovery From Dropout
      12. 8.3.12 Overcurrent and Short-Circuit Protection
      13. 8.3.13 Thermal Shutdown
      14. 8.3.14 Input Supply Current
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Active Mode
        1. 8.4.3.1 CCM Mode
        2. 8.4.3.2 AUTO Mode – Light-Load Operation
          1. 8.4.3.2.1 Diode Emulation
          2. 8.4.3.2.2 Frequency Foldback
        3. 8.4.3.3 FPWM Mode – Light-Load Operation
        4. 8.4.3.4 Minimum On-Time (High Input Voltage) Operation
        5. 8.4.3.5 Dropout
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design 1 – Automotive Synchronous Buck Regulator at 2.1 MHz
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1  Custom Design With WEBENCH® Tools
          2. 9.2.1.2.2  Setting the Output Voltage
          3. 9.2.1.2.3  Choosing the Switching Frequency
          4. 9.2.1.2.4  Inductor Selection
          5. 9.2.1.2.5  Output Capacitor Selection
          6. 9.2.1.2.6  Input Capacitor Selection
          7. 9.2.1.2.7  Bootstrap Capacitor
          8. 9.2.1.2.8  VCC Capacitor
          9. 9.2.1.2.9  BIAS Power Connection
          10. 9.2.1.2.10 Feedforward Network
          11. 9.2.1.2.11 Input Voltage UVLO
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Design 2 – Automotive Synchronous Buck Regulator at 400 kHz
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 Thermal Design and Layout
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.2.1 Design Requirements

Table 9-5 shows the intended input, output, and performance parameters for this application example. Note that during cold-crank operation when the input voltage decreases to 4 V, the converter operates close to dropout but the output voltage remains at its 3.3-V setpoint.

Table 9-5 Design Parameters
DESIGN PARAMETER VALUE
Input voltage range, steady state 4 V to 36 V
Maximum transient input voltage, load dump 42 V
Output voltage and full-load current 3.3 V, 6 A
Switching frequency 400 kHz
Output voltage regulation ±1%
IC input current, no-load < 10 µA
IC shutdown current < 1 µA

Table 9-6 gives the selected buck converter power-stage components with availability from multiple vendors. This design uses a low-DCR inductor and all-ceramic output capacitor implementation.

Table 9-6 List of Materials for Application Circuit 2
REF DES QTY SPECIFICATION VENDOR(1) PART NUMBER
CIN 4 10 µF, 50 V, X7R, 1210, ceramic, AEC-Q200 AVX 12105C106K4T2A
TDK CNA6P1X7R1H106K
10 µF, 50 V, X7S, 1210, ceramic, AEC-Q200 Murata GCM32EC71H106KA03
TDK CGA6P3X7S1H106M
COUT 2 100 µF, 6.3 V, X7S, 1210, ceramic, AEC-Q200 Murata GRT32EC70J107ME13
3 47 µF, 6.3 V, X7R, 1210, ceramic, AEC-Q200 Murata GCM32ER70J476KE19L
Taiyo Yuden JMK325B7476KMHTR
LO 1 3.3 µH, 13.3 mΩ, 8.4 A, 5.0 × 5.0 × 3.1 mm, AEC-Q200 Coilcraft XGL5030-332MEC
3.3 µH, 10 mΩ, 8.6 A, 5.5 × 5.3 × 5.1 mm, AEC-Q200 Coilcraft XGL5050-332MEC
3.3 µH, 22.5 mΩ, 8.3 A, 6.9 × 6.8 × 2.8 mm, AEC-Q200 Cyntec VCMT063T-3R3MN5TM
3.3 µH, 19 mΩ, 16.6 A, 7.3 × 6.6 × 4.8 mm, AEC-Q200 Würth Electronik 74437349033
3.3 µH, 17.1 mΩ, 7.6 A, 7.0 × 6.5 × 4.5 mm, AEC-Q200 TDK SPM6545VT-3R3M-D
U1 1 LM63460-Q1 synchronous buck converter, AEC-Q100 AUTO Texas Instruments LM63460AASQRYFRQ1
FPWM LM63460AFSQRYFRQ1