SNOSDC0A October 2020 – December 2020 LM7310
Applications which need higher steady state current can use multiple LM73100 devices connected in parallel as shown in Figure 8-14 below. In this configuration, the first device turns on initially to provide the inrush current limiting. The second device is held in an OFF state by driving its EN/UVLO pin low by the PG signal of the first device. Once the inrush sequence is complete, the first device asserts its PG pin high, allowing the second device to turn. The second device asserts its PG signal to indicate that it has turned on fully, thereby indicating to the system that the parallel combination is ready to deliver the full steady state current.
Once in steady state, the devices share current nearly equally. There could be a slight skew in the currents depending on the part-to-part variation in the RON as well as the PCB trace resistance mismatch.