SNOSDE6C December 2022 – August 2025 LM74900-Q1 , LM74910-Q1 , LM74910H-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The VDS rating of the MOSFET Q2 should be sufficient to handle the maximum system voltage along with the input transient voltage. For this 12V design, transient overvoltage events are during suppressed load dump 35V 400ms and ISO 7637-2 pulse 2A 50V for 50µs. Further, ISO 7637-2 Pulse 3B is a very fast repetitive pulse of 100V 100ns that is usually absorbed by the input and output ceramic capacitors and the maximum voltage on the 12V battery can be limited to < 40V the minimum recommended input capacitance of 0.1µF. The 50V ISO 7637-2 Pulse 2 A can also be absorbed by input and output capacitors and its amplitude could be reduced to 40V peak by placing sufficient amount of capacitance at input and output. However for this 12V design, maximum system voltage is 50V and a 60V VDS rated MOSFET is selected.
The VGS rating of the MOSFET Q2 should be higher than that maximum HGATE-OUT voltage 15V.
Inrush current through the MOSFET during input hot-plug into the 12V battery is determined by output capacitance. External capacitor on HGATE, CDVDT is used to limit the inrush current during input hot-plug or start-up. The value of inrush current determined by Equation 2 need to be selected to ensure that the MOSFET Q2 is operating well within its safe operating area (SOA). To limit inrush current to 0.5A, CDVDT value of 10.0nF is chosen.
Duration of inrush current is calculated by Equation 17.
Calculated inrush current duration is 2.5ms with 0.5A inrush current.
MOSFET BUK7Y4R8-60E having 60V VDS and ±20V VGS rating is selected for Q2. Power dissipation during inrush is well within the MOSFET's safe operating area (SOA).