SNOSDE6C December   2022  – August 2025 LM74900-Q1 , LM74910-Q1 , LM74910H-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Charge Pump
      2. 8.3.2 Dual Gate Control (DGATE, HGATE)
        1. 8.3.2.1 Reverse Battery Protection (A, C, DGATE)
        2. 8.3.2.2 Load Disconnect Switch Control (HGATE, OUT)
      3. 8.3.3 Overcurrent Protection (CS+, CS-, ILIM, IMON, TMR)
        1. 8.3.3.1 Pulse Overload Protection, Circuit Breaker
        2. 8.3.3.2 Overcurrent Protection With Latch-Off
        3. 8.3.3.3 Short Circuit Protection (ISCP)
        4. 8.3.3.4 Analog Current Monitor Output (IMON)
      4. 8.3.4 Undervoltage Protection, Overvoltage Protection, and Battery Voltage Sensing (UVLO, OV, SW)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Ultra Low IQ Shutdown (EN)
      2. 8.4.2 Low IQ SLEEP Mode (SLEEP)
  10. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical 12V Reverse Battery Protection Application
      1. 9.2.1 Design Requirements for 12V Battery Protection
      2. 9.2.2 Automotive Reverse Battery Protection
        1. 9.2.2.1 Input Transient Protection: ISO 7637-2 Pulse 1
        2. 9.2.2.2 AC Super Imposed Input Rectification: ISO 16750-2 and LV124 E-06
        3. 9.2.2.3 Input Micro-Short Protection: LV124 E-10
      3. 9.2.3 Detailed Design Procedure
        1. 9.2.3.1 Design Considerations
        2. 9.2.3.2 Charge Pump Capacitance VCAP
        3. 9.2.3.3 Input and Output Capacitance
        4. 9.2.3.4 Hold-Up Capacitance
        5. 9.2.3.5 Selection of Current Sense Resistor, RSNS
        6. 9.2.3.6 Selection of Scaling Resistor (RSET) and Short-Circuit Protection Setting Resistor (RSCP)
        7. 9.2.3.7 Overcurrent Limit (ILIM), Circuit Breaker Timer (TMR), and Current Monitoring Output (IMON) Selection
        8. 9.2.3.8 Overvoltage Protection and Battery Monitor
      4. 9.2.4 MOSFET Selection: Blocking MOSFET Q1
      5. 9.2.5 MOSFET Selection: Hot-Swap MOSFET Q2
      6. 9.2.6 TVS Selection
      7. 9.2.7 Application Curves
    3. 9.3 Addressing Automotive Input Reverse Battery Protection Topologies With LM749x0-Q1
    4. 9.4 Power Supply Recommendations
      1. 9.4.1 Transient Protection
      2. 9.4.2 TVS Selection for 12V Battery Systems
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGE|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

MOSFET Selection: Hot-Swap MOSFET Q2

The VDS rating of the MOSFET Q2 should be sufficient to handle the maximum system voltage along with the input transient voltage. For this 12V design, transient overvoltage events are during suppressed load dump 35V 400ms and ISO 7637-2 pulse 2A 50V for 50µs. Further, ISO 7637-2 Pulse 3B is a very fast repetitive pulse of 100V 100ns that is usually absorbed by the input and output ceramic capacitors and the maximum voltage on the 12V battery can be limited to < 40V the minimum recommended input capacitance of 0.1µF. The 50V ISO 7637-2 Pulse 2 A can also be absorbed by input and output capacitors and its amplitude could be reduced to 40V peak by placing sufficient amount of capacitance at input and output. However for this 12V design, maximum system voltage is 50V and a 60V VDS rated MOSFET is selected.

The VGS rating of the MOSFET Q2 should be higher than that maximum HGATE-OUT voltage 15V.

Inrush current through the MOSFET during input hot-plug into the 12V battery is determined by output capacitance. External capacitor on HGATE, CDVDT is used to limit the inrush current during input hot-plug or start-up. The value of inrush current determined by Equation 2 need to be selected to ensure that the MOSFET Q2 is operating well within its safe operating area (SOA). To limit inrush current to 0.5A, CDVDT value of 10.0nF is chosen.

Duration of inrush current is calculated by Equation 17.

Equation 17. LM74900-Q1 LM74910-Q1 LM74910H-Q1

Calculated inrush current duration is 2.5ms with 0.5A inrush current.

MOSFET BUK7Y4R8-60E having 60V VDS and ±20V VGS rating is selected for Q2. Power dissipation during inrush is well within the MOSFET's safe operating area (SOA).