SLUSFB7C September   2023  – September 2025 LMG3624

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 GaN Power FET Switching Parameters
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 GaN Power FET Switching Capability
      2. 7.3.2 Turn-On Slew-Rate Control
      3. 7.3.3 Current-Sense Emulation
      4. 7.3.4 Input Control Pins (EN, IN)
      5. 7.3.5 AUX Supply Pin
        1. 7.3.5.1 AUX Power-On Reset
        2. 7.3.5.2 AUX Under-Voltage Lockout (UVLO)
      6. 7.3.6 Overcurrent Protection
      7. 7.3.7 Overtemperature Protection
      8. 7.3.8 Fault Reporting
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Turn-On Slew-Rate Design
        2. 8.2.2.2 Current-Sense Design
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Solder-Joint Stress Relief
        2. 8.4.1.2 Signal-Ground Connection
        3. 8.4.1.3 CS Pin Signal
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Mechanical Data

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • REQ|38
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.6 Overcurrent Protection

The LMG3624 implements cycle-by-cycle overcurrent protection for the GaN power FETs. Figure 7-5 shows the cycle-by-cycle overcurrent operation. Every IN logic-high cycle turns on the GaN power FET. If the GaN power FET drain current exceeds the overcurrent threshold current, the overcurrent protection turns off the GaN power FET for the remainder of the IN logic-high duration.


LMG3624 Cycle-by-Cycle Overcurrent Protection Operation

Figure 7-5 Cycle-by-Cycle Overcurrent Protection Operation

An overcurrent protection event is not reported on the FLT pin. Cycle-by-cycle overcurrent protection minimizes system disruption because the event is not reported and the protection allows the GaN power FET to turn on every IN cycle.

To prevent the controller from entering a hung state, the low-side overcurrent protection turns off the low-side GaN power FET, thereby generating an artificial CS pin current, as described in Section 7.3.3.