SLUSFB7C September 2023 – September 2025 LMG3624
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
| MIN | NOM | MAX | UNIT | |||
|---|---|---|---|---|---|---|
| Supply voltage | AUX | 10 | 26 | V | ||
| Input voltage | EN, IN | 0 | VAUX | V | ||
| Pull-up voltage on open-drain output | FLT | 0 | VAUX | V | ||
| VIH | High-level input voltage | EN, IN | 2.5 | V | ||
| VIL | Low-level input voltage | 0.6 | V | |||
| ID(cnts) | Drain (D to S) continuous current, FET on | –5.4 | 5.4 | A | ||
| CAUX | AUX to AGND capacitance from external bypass capacitor | 0.030 | µF | |||
| RRDRV | RDRV to AGND resistance from external slew-rate control resistor to configure below slew rate settings | |||||
| slew rate setting 0 (slowest) | 90 | 120 | open | kΩ | ||
| slew rate setting 1 | 42.5 | 47 | 51.5 | kΩ | ||
| slew rate setting 2 | 20 | 22 | 24 | kΩ | ||
| slew rate setting 3 (fastest) | 0 | 5.6 | 11 | kΩ | ||