SNVSCJ1
August 2023
LV5144
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Revision History
5
Description (continued)
6
Pin Configuration and Functions
6.1
Wettable Flanks
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Input Range (VIN)
8.3.2
Output Voltage Setpoint and Accuracy (FB)
8.3.3
High-Voltage Bias Supply Regulator (VCC)
8.3.4
Precision Enable (EN/UVLO)
8.3.5
Power Good Monitor (PGOOD)
8.3.6
Switching Frequency (RT, SYNCIN)
8.3.6.1
Frequency Adjust
8.3.6.2
Clock Synchronization
8.3.7
Configurable Soft Start (SS/TRK)
8.3.7.1
Tracking
8.3.8
Voltage-Mode Control (COMP)
8.3.9
Gate Drivers (LO, HO)
8.3.10
Current Sensing and Overcurrent Protection (ILIM)
8.3.11
OCP Duty Cycle Limiter
8.4
Device Functional Modes
8.4.1
Shutdown Mode
8.4.2
Standby Mode
8.4.3
Active Mode
8.4.4
Diode Emulation Mode
8.4.5
Thermal Shutdown
9
Application and Implementation
9.1
Application Information
9.1.1
Design and Implementation
9.1.2
Power Train Components
9.1.2.1
Inductor
9.1.2.2
Output Capacitors
9.1.2.3
Input Capacitors
9.1.2.4
Power MOSFETs
9.1.3
Control Loop Compensation
9.1.4
EMI Filter Design
9.2
Typical Applications
9.2.1
Design 1 – 12-A High-Efficiency Synchronous Buck DC/DC Regulator
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curves
9.2.2
Design 2 – High Density, 12-V, 8-A Rail From 48-V Telecom Power
9.2.2.1
Design Requirements
9.2.2.2
Detailed Design Procedure
9.2.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.1.1
Power Stage Layout
9.4.1.2
Gate Drive Layout
9.4.1.3
PWM Controller Layout
9.4.1.4
Thermal Design and Layout
9.4.1.5
Ground Plane Design
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Device Support
10.1.1
Third-Party Products Disclaimer
10.1.2
Development Support
10.2
Documentation Support
10.2.1
Related Documentation
10.2.1.1
PCB Layout Resources
10.2.1.2
Thermal Design Resources
10.3
Receiving Notification of Documentation Updates
10.4
Support Resources
10.5
Trademarks
10.6
Electrostatic Discharge Caution
10.7
Glossary
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RGY|20
MPQF116H
Thermal pad, mechanical data (Package|Pins)
RGY|20
QFND755
Orderable Information
snvscj1_oa
snvscj1_pm
9.1.1
Design and Implementation