SNVSCJ1 August   2023 LV5144

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Description (continued)
  7. 6 Pin Configuration and Functions
    1. 6.1 Wettable Flanks
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Input Range (VIN)
      2. 8.3.2  Output Voltage Setpoint and Accuracy (FB)
      3. 8.3.3  High-Voltage Bias Supply Regulator (VCC)
      4. 8.3.4  Precision Enable (EN/UVLO)
      5. 8.3.5  Power Good Monitor (PGOOD)
      6. 8.3.6  Switching Frequency (RT, SYNCIN)
        1. 8.3.6.1 Frequency Adjust
        2. 8.3.6.2 Clock Synchronization
      7. 8.3.7  Configurable Soft Start (SS/TRK)
        1. 8.3.7.1 Tracking
      8. 8.3.8  Voltage-Mode Control (COMP)
      9. 8.3.9  Gate Drivers (LO, HO)
      10. 8.3.10 Current Sensing and Overcurrent Protection (ILIM)
      11. 8.3.11 OCP Duty Cycle Limiter
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Active Mode
      4. 8.4.4 Diode Emulation Mode
      5. 8.4.5 Thermal Shutdown
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Design and Implementation
      2. 9.1.2 Power Train Components
        1. 9.1.2.1 Inductor
        2. 9.1.2.2 Output Capacitors
        3. 9.1.2.3 Input Capacitors
        4. 9.1.2.4 Power MOSFETs
      3. 9.1.3 Control Loop Compensation
      4. 9.1.4 EMI Filter Design
    2. 9.2 Typical Applications
      1. 9.2.1 Design 1 – 12-A High-Efficiency Synchronous Buck DC/DC Regulator
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Design 2 – High Density, 12-V, 8-A Rail From 48-V Telecom Power
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 Power Stage Layout
        2. 9.4.1.2 Gate Drive Layout
        3. 9.4.1.3 PWM Controller Layout
        4. 9.4.1.4 Thermal Design and Layout
        5. 9.4.1.5 Ground Plane Design
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Development Support
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
        1. 10.2.1.1 PCB Layout Resources
        2. 10.2.1.2 Thermal Design Resources
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.6 Typical Characteristics

VVIN = 48 V, RRT = 25 kΩ, SYNCIN tied to VCC, EN/UVLO tied to VIN (unless otherwise noted).

GUID-0FB37D88-28BA-44EB-8C13-65094FD382D3-low.gif
VOUT = 5 VFSW = 300 kHz
See Figure 9-5RRT = 33.2 kΩ
Figure 7-1 Efficiency vs Load, CCM
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Figure 7-3 FB Voltage vs Junction Temperature
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VSW = 0 VVEN/UVLO = 0 V
Figure 7-5 IQ-SHD vs Input Voltage
GUID-0056C401-6DAB-4993-970D-2EB47AF95990-low.gif
VSW = 0 VVEN/UVLO = VVINVSS/TRK = 0 V
Figure 7-7 IQ-OPERATING (Nonswitching) vs Input Voltage
GUID-6F664E1B-A32F-4289-A1CE-870E9AEF0E16-low.gif
VSW = 0 VVVCC = VBST = VILIMVFB = 0 V
Figure 7-9 VIN Quiescent Current with External VCC Applied
GUID-9D1D7559-1614-44E4-BDE5-3ECDB0A67A1A-low.gif
VSW = 0 V
Figure 7-11 Deadtime vs Junction Temperature
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Figure 7-13 BST UVLO Thresholds vs Junction Temperature
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Figure 7-15 PGOOD OVP Thresholds vs Junction Temperature
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Figure 7-17 EN Standby Thresholds vs Junction Temperature
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RRT = 25 kΩ
Figure 7-19 Oscillator Frequency vs Junction Temperature
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Figure 7-21 Gate Driver Peak Current vs VCC Voltage
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Figure 7-23 LO Driver Resistance vs VCC Voltage
GUID-ADB3623E-F173-439D-8369-B4FFC1C9BFD9-low.gif
VIN = 5.5 V
Figure 7-25 VCC vs ICC Characteristic
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Figure 7-27 BST Diode Forward Voltage vs Current
GUID-D8D3ECB5-4141-45EF-AE46-E34CDF7CCAA2-low.gif
VOUT = 12 V FSW = 400 kHz
See Figure 9-16RRT = 24.9 kΩ
Figure 7-2 Efficiency vs Load, CCM
GUID-8896FBC1-8207-44A1-90C7-FF9A92E551A5-low.gif
Figure 7-4 tON(min) and tOFF(min) vs Junction Temperature
GUID-76A5BBF2-0391-4673-9537-2F3C1A4A4294-low.gif
VSW = 0 VVEN/UVLO = 1 V
Figure 7-6 IQ-STANDBY vs Input Voltage
GUID-CE861743-BD57-4426-8C38-925C7F28A8D8-low.gif
VSW = 0 VHO, LO Open
Figure 7-8 IQ-OPERATING (Switching) vs Input Voltage
GUID-0CB09A28-2A06-4F57-A9DE-23E2A685B106-low.gif
Figure 7-10 ILIM Current Source vs Junction Temperature
GUID-0DF22F91-5084-49E7-B13D-F75E0B24FC18-low.gif
Figure 7-12 VCC UVLO Thresholds vs Junction Temperature
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Figure 7-14 PGOOD UVP Thresholds vs Junction Temperature
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Figure 7-16 EN/UVLO Threshold vs Junction Temperature
GUID-B78238A6-506F-4E0E-9721-F5E57F24C2B4-low.gif
VSW = 0 V
Figure 7-18 Oscillator Frequency vs RT Resistance
GUID-C0CCADAF-F2EF-4BA0-B380-0DCE1B5BDC46-low.gif
RRT = 10 kΩ
Figure 7-20 Oscillator Frequency vs Junction Temperature
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Figure 7-22 HO Driver Resistance vs VCC Voltage
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VSS/TRK = 0 V
Figure 7-24 VCC Voltage vs Input Voltage
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VIN = 12 V
Figure 7-26 VCC vs ICC Characteristic
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Figure 7-28 SS/TRK Current Source vs Junction Temperature