SLASEW9C February   2023  – October 2023 MSPM0G1505 , MSPM0G1506 , MSPM0G1507

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagrams
    2. 6.2 Pin Attributes
    3. 6.3 Signal Descriptions
    4. 6.4 Connections for Unused Pins
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Characteristics
      1. 7.5.1 RUN/SLEEP Modes
      2. 7.5.2 STOP/STANDBY Modes
      3. 7.5.3 SHUTDOWN Mode
    6. 7.6  Power Supply Sequencing
      1. 7.6.1 POR and BOR
      2. 7.6.2 Power Supply Ramp
    7. 7.7  Flash Memory Characteristics
    8. 7.8  Timing Characteristics
    9. 7.9  Clock Specifications
      1. 7.9.1 System Oscillator (SYSOSC)
        1. 7.9.1.1 SYSOSC Typical Frequency Accuracy
      2. 7.9.2 Low Frequency Oscillator (LFOSC)
      3. 7.9.3 System Phase Lock Loop (SYSPLL)
      4. 7.9.4 Low Frequency Crystal/Clock
      5. 7.9.5 High Frequency Crystal/Clock
    10. 7.10 Digital IO
      1. 7.10.1 Electrical Characteristics
      2. 7.10.2 Switching Characteristics
    11. 7.11 Analog Mux VBOOST
    12. 7.12 ADC
      1. 7.12.1 Electrical Characteristics
      2. 7.12.2 Switching Characteristics
      3. 7.12.3 Linearity Parameters
      4. 7.12.4 Typical Connection Diagram
    13. 7.13 Temperature Sensor
    14. 7.14 VREF
      1. 7.14.1 Voltage Characteristics
      2. 7.14.2 Electrical Characteristics
    15. 7.15 Comparator (COMP)
      1. 7.15.1 Comparator Electrical Characteristics
    16. 7.16 DAC
      1. 7.16.1 DAC_Supply Specifications
      2. 7.16.2 DAC Output Specifications
      3. 7.16.3 DAC Dynamic Specifications
      4. 7.16.4 DAC Linearity Specifications
      5. 7.16.5 DAC Timing Specifications
    17. 7.17 GPAMP
      1. 7.17.1 Electrical Characteristics
      2. 7.17.2 Switching Characteristics
    18. 7.18 OPA
      1. 7.18.1 Electrical Characteristics
      2. 7.18.2 Switching Characteristics
      3. 7.18.3 PGA Mode
    19. 7.19 I2C
      1. 7.19.1 I2C Characteristics
      2. 7.19.2 I2C Filter
      3. 7.19.3 I2C Timing Diagram
    20. 7.20 SPI
      1. 7.20.1 SPI
      2. 7.20.2 SPI Timing Diagram
    21. 7.21 UART
    22. 7.22 TIMx
    23. 7.23 TRNG
      1. 7.23.1 TRNG Electrical Characteristics
      2. 7.23.2 TRNG Switching Characteristics
    24. 7.24 Emulation and Debug
      1. 7.24.1 SWD Timing
  9. 8 Detailed Description
    1. 8.1  CPU
    2. 8.2  Operating Modes
      1. 8.2.1 Functionality by Operating Mode (MSPM0G150x)
    3. 8.3  Power Management Unit (PMU)
    4. 8.4  Clock Module (CKM)
    5. 8.5  DMA
    6. 8.6  Events
    7. 8.7  Memory
      1. 8.7.1 Memory Organization
      2. 8.7.2 Peripheral File Map
      3. 8.7.3 Peripheral Interrupt Vector
    8. 8.8  Flash Memory
    9. 8.9  SRAM
    10. 8.10 GPIO
    11. 8.11 IOMUX
    12. 8.12 ADC
    13. 8.13 Temperature Sensor
    14. 8.14 VREF
    15. 8.15 COMP
    16. 8.16 DAC
    17. 8.17 OPA
    18. 8.18 GPAMP
    19. 8.19 TRNG
    20. 8.20 AES
    21. 8.21 CRC
    22. 8.22 UART
    23. 8.23 I2C
    24. 8.24 SPI
    25. 8.25 WWDT
    26. 8.26 RTC
    27. 8.27 Timers (TIMx)
    28. 8.28 Device Analog Connections
    29. 8.29 Input/Output Diagrams
    30. 8.30 Serial Wire Debug Interface
    31. 8.31 Bootstrap Loader (BSL)
    32. 8.32 Device Factory Constants
    33. 8.33 Identification
  10. 9 Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
  11. 10Device and Documentation Support
    1. 10.1 Getting Started and Next Steps
    2. 10.2 Device Nomenclature
    3. 10.3 Tools and Software
    4. 10.4 Documentation Support
    5. 10.5 Support Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Glossary
  12. 11Mechanical, Packaging, and Orderable Information
  13. 12Revision History

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.2 Device Nomenclature

To designate the stages in the product development cycle, TI assigns prefixes to the part numbers of all MSP MCU devices and support tools. . Each MSP MCU commercial family member has one of two prefixes: MSP or X. These prefixes represent evolutionary stages of product development from engineering prototypes (X) through fully qualified production devices (MSP).

X – Experimental device that is not necessarily representative of the final device's electrical specifications

MSP – Fully qualified production device

X devices are shipped against the following disclaimer:

"Developmental product is intended for internal evaluation purposes." MSP devices have been characterized fully, and the quality and reliability of the device have been demonstrated fully. TI's standard warranty applies. Predictions show that prototype devices (X) have a greater failure rate than the standard production devices. TI recommends that these devices not be used in any production system because their expected end-use failure rate still is undefined. Only qualified production devices are to be used.

TI device nomenclature also includes a suffix with the device family name. This suffix indicates the temperature range, package type, and distribution format. Figure 10-1 provides a legend for reading the complete device name.

GUID-20230605-SS0I-8GCK-6WDB-NSXVBNDR2B3M-low.svg Figure 10-1 Device Nomenclature
Table 10-1 Device Nomenclature
Processor Family

MSP = Mixed-signal processor

X= Experimental silicon
MCU Platform M0 = Arm based 32-bit M0+
Product Family G = 80-MHz frequency
Device Subfamily 150 = 2x ADC, 2x OPA, 3x COMP
Flash Memory

5 = 32KB

6 = 64KB

7 = 128KB
Temperature Range

S = –40°C to 125°C

Package Type See the Device Comparison section and https://www.ti.com/packaging
Distribution Format

R = Large reel

For orderable part numbers of MSP devices in different package types, see the Package Option Addendum of this document, ti.com, or contact your TI sales representative.