SBOS778D April 2016 – April 2021 THS4551
Adding a feedback capacitor to band-limit the signal path is very common in lower frequency designs. This approach is very effective for the signal path gain but does create the potential for high-frequency peaking and oscillation for a wideband device such as the THS4551. The feedback capacitor by itself takes the noise gain to 1 V/V at high frequencies. Depending on the frequency where the noise gain goes to 1V/V, and what added phase margin reduction may already be in place resulting from the load RC, the feedback capacitors can cause instability.
Figure 10-7 shows the starting point for a typical band-limited design. At lower frequencies, this example delivers a gain of 10 V/V with an intentional band limit in the feedback RC at 320 kHz. This single 5-V design targets a midsupply output common-mode voltage with only a noise reduction capacitor on the VOCM input control.
The response shape must be probed at the FDA output pins before the added RC pole to the SAR input. Running a wideband sweep with the THS4551 TINA-TI™ model using the SBOC475 simulation file shows a resonance at 50 MHz in Figure 10-8 resulting from the feedback capacitor.
One approach to increasing the phase margin when there is a feedback capacitor is to include a differential input capacitor. This approach increases the noise gain at higher frequencies, thus creating a lower-frequency loop gain equal to a 0-dB crossover with more phase margin. Figure 10-9 shows a differential input capacitor equal to the feedback capacitor in the test circuit. This approach increases the noise gain from 1 V/V at higher frequencies (with only a feedback capacitor) to a noise gain of 3 V/V at higher frequencies.
Re-running the wideband response (using the SBOC474 TINA-TI™ simulation file) simulation illustrates in Figure 10-10 that the resonance is greatly reduced with the higher noise gain at the loop gain equal to a 0-dB crossover at a lower frequency. Although this example is only modestly peaking, good design practice is to include a place for a differential input capacitor (even if not used) for any design using a feedback capacitor across the feedback resistors. This recommendation applies to this simple example and to multiple feedback active filter designs.