THS4551

9 mm² 3 x 3

15 mm² 3 x 4.9

4 mm² 2 x 2

Bandwidth: 150 MHz (G = 1 V/V)
Differential Output Slew Rate: 220 V/µs
Gain Bandwidth Product: 135 MHz
Negative Rail Input (NRI), Rail-to-Rail Output (RRO)
Wide Output Common-Mode Control Range
Single-Supply Operating Range: 2.7 V to 5.4 V
Trimmed-Supply Current: 1.37 mA at 5 V
25°C Input Offset: ±175 µV (max)
Input Offset Voltage Drift: ±1.8 µV/°C (max)
Differential Input Voltage Noise: 3.3 nV/√ Hz
HD2: –128 dBc at 2 V_PP, 100 kHz
HD3: –139 dBc at 2 V_PP, 100 kHz
< 50-ns Settling Time: 4-V Step to 0.01%
18-Bit Settling Time: 4-V Step, < 500 ns

Bandwidth: 150 MHz (G = 1 V/V)
Differential Output Slew Rate: 220 V/µs
Gain Bandwidth Product: 135 MHz
Negative Rail Input (NRI), Rail-to-Rail Output (RRO)
Wide Output Common-Mode Control Range
Single-Supply Operating Range: 2.7 V to 5.4 V
Trimmed-Supply Current: 1.37 mA at 5 V
25°C Input Offset: ±175 µV (max)
Input Offset Voltage Drift: ±1.8 µV/°C (max)
Differential Input Voltage Noise: 3.3 nV/√ Hz
HD2: –128 dBc at 2 V_PP, 100 kHz
HD3: –139 dBc at 2 V_PP, 100 kHz
< 50-ns Settling Time: 4-V Step to 0.01%
18-Bit Settling Time: 4-V Step, < 500 ns

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The THS4551 fully differential amplifier offers an easy interface from single-ended sources to the differential output required by high-precision analog-to-digital converters (ADCs). Designed for exceptional dc accuracy, low noise, and robust capacitive load driving, this device is well suited for data acquisition systems where high precision is required along with the best signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) through the amplifier and ADC combination.

The THS4551 features the negative rail input required when interfacing a dc-coupled, ground-centered, source signal to a single-supply differential input ADC. Very low dc error and drift terms support the emerging 16- to 20-bit successive-approximation register (SAR) input requirements. A wide-range output common-mode control supports the ADC running from 1.8-V to 5-V supplies with ADC common-mode input requirements from 0.7 V to greater than 3.0 V.

The THS4551 device is characterized for operation over the wide temperature range of –40°C to +125°C, and is available in 8-pin VSSOP, 16-pin VQFN, and 10-pin WQFN packages.

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Technical documentation

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	Type	Title	Date
*	Data sheet	THS4551 Low-Noise, Precision, 150-MHz, Fully Differential Amplifier datasheet (Rev. D)	23 Apr 2021
	Technical article	Balancing ADC size, power, resolution and bandwidth in precision data-acquisition systems	03 Dec 2021
	Application note	Optimizing LCR Meter Front-End Design for Accurate Impedance Measurements	20 Jan 2021
	Application note	Setting a Constant Common-Mode Voltage for Fully-Differential SAR ADC Inputs	06 Sep 2019
	Application note	High-input impedance, true differential, AFE attenuator circuit for SAR ADCs (Rev. A)	08 Mar 2019
	Application note	True differential, 4 × 2 MUX, analog front end, simultaneous-sampling ADC circui (Rev. A)	15 Nov 2018
	Application note	Maximizing System Total Harmonic Distortion Using High Speed Amplifiers	20 Jun 2018
	Application note	Attenuator Amplifier Design to Maximize the Input Voltage of Differential ADCs	14 Jun 2018
	Application note	High-current battery monitor circuit: 0–10A, 0-10kHz, 18 bit	22 Dec 2017
	Application note	Precision Sum Circuit Support Hi Output Current Multiple AFEs in Ultasound App	20 Nov 2017
	Technical article	Powering up the performance of sensitive test and measurement systems	17 Oct 2017
	E-book	The Signal e-book: A compendium of blog posts on op amp design topics	28 Mar 2017
	Technical article	What you need to know about input bias current – and why	08 Dec 2016
	Technical article	How to minimize filter loss when you drive an ADC	20 Oct 2016
	Application note	Noise Analysis for High Speed Op Amps (Rev. A)	17 Jan 2005

Design & development

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