SLVSO96 October   2026 TICS100MOD

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Resistance Characteristics
    5. 6.5 Electrical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Processor Subsystem
      1. 7.2.1 Arm Cortex-R5F Subsystem
    3. 7.3 Identification
  9. 8 Application Information
    1. 8.1 Typical Application
    2. 8.2 Reset
    3. 8.3 Boot Modes
    4. 8.4 LED Indicators
    5. 8.5 Thermal Considerations
    6. 8.6 PCB Layout Recommendations
    7. 8.7 Protocol Support Details
  10. 9 Device and Documentation Support
    1. 9.1 Device Nomenclature
      1. 9.1.1 Device Nomenclature Boilerplate
    2. 9.2 Tools and Software
    3. 9.3 Documentation Support
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Mechanical, Packaging, and Orderable Information
  12. 11Revision History

Package Options

Mechanical Data (Package|Pins)
  • 0|0
Thermal pad, mechanical data (Package|Pins)
Orderable Information

PCB Layout Recommendations

General:

Keep high-speed differential traces away from switching power supplies.

Ethernet Differential Pairs:

  • Route as 100Ω differential pairs, 50Ω single-ended for other signals
  • Match trace lengths within each pair
  • Avoid vias and stubs in differential pairs
  • Maintain a solid return path (ground plane) beneath all MDI traces
EMI/EMC Considerations:
  • Add TVS diodes like ESDS314DBVR on Ethernet ports for ESD protection
  • Shielded Ethernet cables are recommended for noisy environments