SNOSDJ6A May   2025  – October 2025 TLV9020L , TLV9022L , TLV9030L , TLV9032L

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
    1. 4.1 Pin Functions: TLV9020L and TLV9030L Single
    2. 4.2 Pin Configurations:TLV9022L and TLV9032L Dual
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information - Single
    5. 5.5 Thermal Information - Dual
    6. 5.6 Electrical Characteristics
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
      1. 6.4.1 Outputs
        1. 6.4.1.1 TLV902xL Open-Drain Output
        2. 6.4.1.2 TLV903xL Push-Pull Output
      2. 6.4.2 Power-On Reset (POR)
        1. 6.4.2.1 TLV902xL Open Drain Output POR Behavior
        2. 6.4.2.2 TLV903xL Push-Pull Output POR Behavior
      3. 6.4.3 Output Latching
        1. 6.4.3.1 "L1" and "L2" Power-On Options
        2. 6.4.3.2 TLV902xL1 Open-Drain Latch Behavior
        3. 6.4.3.3 TLV902xL2 Open-Drain Latch Behavior
        4. 6.4.3.4 TLV903xL1 Push-Pull Latch Behavior
        5. 6.4.3.5 TLV903xL2 Push-Pull Latch Behavior
        6. 6.4.3.6 Clear (CLR) Input
      4. 6.4.4 Inputs
        1. 6.4.4.1 Rail to Rail Input
        2. 6.4.4.2 Fail-Safe Inputs
        3. 6.4.4.3 Input Protection
        4. 6.4.4.4 Internal Hysteresis
        5. 6.4.4.5 Unused Inputs
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Basic Comparator Definitions
        1. 7.1.1.1 Operation
        2. 7.1.1.2 Propagation Delay
        3. 7.1.1.3 Overdrive Voltage
    2. 7.2 Typical Applications
      1. 7.2.1 Window Comparator
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4.3.6 Clear (CLR) Input

When CLR is high or low, and the comparator is not in a latched condition, the comparator is active ("armed") and responding to the input conditions, ready for the next qualifying condition to latch.

The CLR input only clears the output latch on the high-to-low (falling) edge of the CLR input. The comparator is then active (armed) after the clear until the next latch condition event.

Using the falling-edge to trigger the reset allows the CLR pin to be either a steady high or low, which prevents a hardware or software failure from locking-up the comparator and allows meeting saftey-critical design requirements.

There can be a setup-time contention if the CLR pin is transitioning (falling) at the same time as the comparator output transitions. The output state is indeterminate during the CLR falling edge time. The recommendation is to make the CLR falling-edge as fast as possible to aviod this contention (<100ns fall time).

The CLR pin features a Failsafe, or "5V Compatible" input, accepting logic high levels up to 5V, independent of the comparator supply voltage. The logic high (VOH) threshold is 1.2V.

The CLR input also has a light 200nA active pull-down current to make sure that the CLR pin is low during start-up and the comparator is active. Even with this pull-down, floating the CLR input is not recommended.