SBOSAJ5 December 2024 TMP113
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The TMP113 has a standard bidirectional I2C interface that is controlled by a controller device to be configured or read the data from TMP113 device. Each target on the I2C bus has a specific device address to differentiate between other target devices that are on the same I2C bus. Many target devices require configuration upon start-up to set the behavior of the device. This is typically done when the controller accesses internal register maps of the target, which have unique register addresses. A device can have one or multiple registers where data is stored, written, or read. The TMP113 includes 50ns glitch suppression filters, allowing the device to coexist on an I3C mixed bus. The TMP113 supports transmission data rates up to 3.4MHz.