SLVSHA1C September   2024  – August 2025 TPS1685

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Logic Interface
    7. 6.7 Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Undervoltage Protection
      2. 7.3.2  Insertion Delay
      3. 7.3.3  Overvoltage Protection
      4. 7.3.4  Inrush Current, Overcurrent, and Short-Circuit Protection
        1. 7.3.4.1 Slew rate (dVdt) and Inrush Current Control
          1. 7.3.4.1.1 Start-Up Time Out
        2. 7.3.4.2 Steady-State Overcurrent Protection (Circuit-Breaker)
        3. 7.3.4.3 Active Current Limiting During Start-Up
        4. 7.3.4.4 Short-Circuit Protection
      5. 7.3.5  Analog Load Current Monitor (IMON)
      6. 7.3.6  Mode Selection (MODE)
      7. 7.3.7  Parallel Device Synchronization (SWEN)
      8. 7.3.8  Stacking Multiple eFuses for Unlimited Scalability
        1. 7.3.8.1 Current Balancing During Start-Up
      9. 7.3.9  Analog Junction Temperature Monitor (TEMP)
      10. 7.3.10 Overtemperature Protection
      11. 7.3.11 Fault Response and Indication (FLT)
      12. 7.3.12 Power Good Indication (PG)
      13. 7.3.13 Output Discharge
      14. 7.3.14 FET Health Monitoring
      15. 7.3.15 Single Point Failure Mitigation
        1. 7.3.15.1 IMON Pin Single Point Failure
        2. 7.3.15.2 IREF Pin Single Point Failure
        3. 7.3.15.3 ITIMER Pin Single Point Failure
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Single Device, Standalone Operation
      2. 8.1.2 Multiple Devices, Parallel Connection
    2. 8.2 Typical Application: 54V Power Path Protection in Data Center Servers
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Transient Protection
      2. 8.3.2 Output Short-Circuit Measurements
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • VMA|23
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

–40°C ≤ TJ ≤ +125°C, VIN = VDD = 50V, OUT = Open, RILIM = 931Ω,  RIMON = 2.55kΩ, VIREF = 1V , FLT = 33kΩ pull-up to 3.3V, PGOOD = 33kΩ pull-up to 3.3V, COUT = 10µF, CIN = 10nF, dVdT = Open, ITIMER = Open, VEN/UVLO = 2V, TEMP = Open, MODE = Open.  (All voltages referenced to GND, (unless otherwise noted))
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT SUPPLY (VDD)
VIN Input voltage range 9 80 V
VDD Input voltage range VIN 80 V
IQON(VDD) VDD ON state quiescent current VDD > VUVPR, VEN ≥ VUVLOR, VOVP < VOVPF 0.6 4 mA
VUVPR VDD Undervoltage Protection Threshold Rising VDD Rising 8.5 8.9 V
VUVPF VDD Undervoltage Protection Threshold falling VDD Falling 6.7 7.05 V
VUVPHYS UVP Hysteresis VDD 1.5 V
INPUT SUPPLY (IN)
VUVPR(VIN) VIN Undervoltage Protection Threshold VIN Rising 8.45 9 V
VUVPF(VIN) VIN Undervoltage Protection Threshold VIN Falling 6.5 7.05 V
IQON(VIN) VIN ON state quiescent current VEN ≥ VUVLOR 1.69 mA
IQOFF(VIN) VIN OFF state current   VSDR < VEN < VUVLO 47 µA
ISD(VIN) VIN shutdown current VEN < VSDF 46 µA
ENABLE / UNDERVOLTAGE LOCKOUT (EN/UVLO)
VUVLO(R) EN/UVLO pin voltage threshold for turning on, rising EN/UVLO  Rising 1.18 1.21 1.23 V
VUVLO(F) EN/UVLO pin voltage threshold for turning off and engaging QOD, falling  (primary device) EN/UVLO Falling 1 1.12 1.14 V
VUVLOF EN/UVLO pin voltage threshold for turning off and engaging QOD, falling  (Secondary device) EN/UVLO Falling 1 V
VUVLOHYS UVLO Hysteresis 89 mV
VSDF Shutdown threshold EN/UVLO Falling 0.4 0.42 V
VSDR Shutdown threshold EN/UVLO  Rising  0.5 0.55 V
IENLKG EN/UVLO pin leakage current –100 100 nA
OVERVOLTAGE PROTECTION (IN)
VOVP(R) Overvoltage protection threshold (rising) OVP pin rising 1.11 1.17 1.20 V
VOVP(F) Overvoltage protection threshold (falling) OVP pin falling 1.08 1.12 1.15 V
VOVPHYS Overvoltage protection threshold (Hysteresis) 57 mV
IOVPLKG OVP pin leakage current VOVP = 1.2V –100 100 nA
VOVPR(IN) Internal Overvoltage protection threshold (rising) VIN Rising 84 90.8 95 V
VOVPF(IN) Internal Overvoltage protection threshold (falling) VIN falling 77 84.5 90 V
ON-RESISTANCE (IN - OUT)
RON ON state resistance IOUT = 12A; TJ = 25°C 3.5 5.55 mΩ
RON ON state resistance IOUT = 12A; TJ = –40°C to 125°C 6.1 mΩ
CURRENT LIMIT REFERENCE (IREF)
VIREF IREF pin recommended voltage range 0.3 1.2 V
IIREF IREF internal sourcing current VIREF = 1V 24.2 25 25.8 µA
CURRENT LIMIT (ILIM)
GILIM(LIN) Current Monitor Gain (ILIM:IOUT) vs. IOUT. Device in steady state (PG asserted), IOUT = 12 A 17 18 20.6 µA/A
Istart-up peak Peak Current at Startup (Ipeak ) VOUT> VFB, GHI deasserted. VIN≤60V 0.5 A
VFB Foldback voltage 2 V
OUTPUT CURRENT MONITOR AND OVERCURRENT PROTECTION (IMON)
GIMON Current Monitor Gain (IMON:IOUT) Device in steady state (PG asserted), for  12A ≤ IOUT ≤ 20A 17.7 18.18 18.49 µA/A
GIMON Current Monitor Gain (IMON:IOUT) Device in steady state (PG asserted),  IOUT = 4A 17.4 18.31 19.1 µA/A
IOCP IOUT Current limit trip (Circuit-Breaker) threshold RIMON = 2.55kΩ, VIREF = 1V 21.2 21.7 22.3 A
CURRENT FAULT TIMER (ITIMER)
IITMR ITIMER pin internal discharge current IOUT > IOCP, ITIMER ↓ 1.77 2.2 2.6 µA
RITMR ITIMER pin internal pull-up resistance
5		 12.3 23 kΩ
VINT ITIMER pin internal pull-up voltage IOUT < IOCP 4.4 5 5.6 V
ΔVITMR ITIMER discharge voltage IOUT > ITRIP, ITIMER ↓ 1.28 1.5 1.8 V
ΔVITMR/IITMR  ITIMER Discharge voltage to Discharge current ratio IOUT > ITRIP, ITIMER ↓ 0.49 0.72 0.97 V/µA
SHORT-CIRCUIT PROTECTION
IFFT Fixed fast-trip threshold in steady state (primary)(TPS1685xA only) PG asserted High (MODE = Open) 83 A
IFFT Fixed fast-trip threshold in steady state (primary)(TPS1685x) PG asserted High (MODE = Open) 73 A
IFFT Fixed fast-trip threshold in steady state (primary)(TPS1685xA only) PG asserted High (MODE = Open); TJ = 25°C to 125°C  65 A
IFFT Fixed fast-trip threshold in steady state (primary)(TPS1685x) PG asserted High (MODE = Open); TJ = 25°C to 125°C  55 A
IFFT Fixed fast trip threshold in steady state (secondary)(TPS1685A0 only) PG asserted High (MODE = GND) 105 A
IFFT Fixed fast trip threshold in steady state (secondary)(TPS1685x) PG asserted High (MODE = GND) 95 A
ISFT Scalable fast trip current RSFT_SEL < 95kΩ, PG asserted High (MODE = Open) 38.3 A
ISFT Scalable fast trip current 105kΩ < RSFT_SEL < 195kΩ, PG asserted High (MODE = Open) 2.5 × IOCP A
ISFT Scalable fast trip current 105kΩ < RSFT_SEL < 195kΩ, PG asserted High (MODE = GND) 2.8 × IOCP A
ISFT Scalable fast trip current 205kΩ < RSFT_SEL < 295kΩ, PG asserted High (MODE = Open) 2 × IOCP A
ISFT Scalable fast trip current 205kΩ < RSFT_SEL < 295kΩ, PG asserted High (MODE = GND) 2.26 × IOCP A
ISFT Scalable fast trip current 305kΩ < RSFT_SEL, PG asserted High (MODE = Open) 1.5 × IOCP A
ISFT Scalable fast trip current 305kΩ < RSFT_SEL,PG asserted High (MODE = GND) 1.71 × IOCP A
ISFT(SAT) Scalable fast trip Current (inrush) During Powerup, PGOOD Low 2 A
ACTIVE CURRENT SHARING
RON(ACS) RON during Active current sharing VILIM > 1.1 x (1/3) × VIREF 4.38 6.9 mΩ
GIMON(ACS) IMON:IOUT ratio during active current limiting PG asserted High,  VILIM > 1.1 × VIREF  17.24 18.49
19.84		 µA/A
CLREF(ACS) Ratio of active current sharing trigger threshold to steady state circuit-breaker threshold PG asserted High 36.67 %
INRUSH CURRENT PROTECTION (DVDT)
IDVDT dVdt Pin Charging Current (Primary/Standalone mode) MODE = Open 1.5 2.0 3 µA
GDVDT dVdt Gain  0.4V < VdVdt  < 2.4V 22 25 28 V/V
IDVDTLKG dVdt Pin Leakage Current (Secondary mode) MODE = GND –100 100 nA
RDVDT dVdt Pin to GND Discharge Resistance 500 Ω
GHI
VGS(GHI) Rising  G-S Threshold when GHI/PG is asserted 7 V
RON(GHI) Ron When GHI/PG is asserted
3.8		 mΩ
QUICK OUTPUT DISCHARGE (QOD)
IQOD Quick Output Discharge pull-down current VSD(R) < VEN < VUVLO, –40 < Tj < 125 ℃ 17 22 25 mA
TEMPERATURE SENSOR OUTPUT (TEMP)
GTMP TEMP sensor gain VIN = 51V 2.6 2.73 3.1 mV/℃
VTMP TEMP pin output voltage TJ = 25 ℃, VIN = 51 V 670 678 690 mV
ITMPSRC TEMP pin sourcing current VIN = 51V 110 119 133 µA
ITMPSNK TEMP pin sinking current VIN = 51 V 8 10 14 µA
OVERTEMPERATURE PROTECTION (OTP)
TSD Absolute Thermal Shutdown Rising Threshold TJ Rising, , VIN = 51V 150 °C
TSDHYS Absolute Thermal shutdown hysteresis TJ Falling, VIN = 51V 13 °C
FET HEALTH MONITOR
VDSFLT FET D-S Fault Threshold SWEN = L, VIN = 51V 0.5 V
VDSOK FET D-S Fault Recovery Threshold  SWEN = L, VIN = 51V 0.64 V
SINGLE POINT FAILURE (IMON, IREF, ITIMER)
IOC_BKP Back-up overcurrent protection threshold IMON short to GND 38.3 A