GATE is the gate drive outputs for the DC-DC converter's main switching MOSFET, while GAT2 is its second gate drive.

GATE's phase turns the main switch on when it transitions high, and off when it transitions low. It is also held low when the converter is disabled.

GAT2's phase turns the second switch off when it transitions high, and on when it transitions low. GAT2 is also held low when the converter is disabled. This output can drive active-clamp PMOS devices, and driven flyback synchronous rectifiers. Connecting DT to VB also disables GAT2 in a high-impedance condition.

DT input is used to set the delay between GATE and GAT2 to prevent overlap of MOSFET on times as shown in Figure 7-1. Both MOSFETs should be off between GAT2 going high to GATE going high, and GATE going low to GAT2 going low. The maximum GATE ON time is reduced by the programmed dead-time period. The dead time period is specified with 1 nF of capacitance on GATE and with 0.5-nF capacitance on GAT2. Different loading on these pins changes the effective dead time. A resistor connected from DT to AGND sets the delay between GATE and GAT2 following TBD figure. Note that even in situations like VCC UVLO or return to inrush phase, the programmed dead time is maintained until the switching stops completely.