SLVSAX2B September   2011  – June 2020 TPS61170-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Typical Application
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Soft Start-up
      2. 7.3.2 Overcurrent Protection
      3. 7.3.3 Undervoltage Lockout
      4. 7.3.4 Thermal Shutdown
      5. 7.3.5 Enable and Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 PWM Program Mode
      2. 7.4.2 1-Wire Program Mode
      3. 7.4.3 EasyScale
    5. 7.5 Programming
      1. 7.5.1 Feedback Reference Program Mode Selection
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 12-V to 24-V DC-DC Power Conversion
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Program Output Voltage
          2. 8.2.1.2.2 Maximum Output Current
          3. 8.2.1.2.3 Switch Duty Cycle
          4. 8.2.1.2.4 Inductor Selection
          5. 8.2.1.2.5 Schottky Diode Selection
          6. 8.2.1.2.6 Compensation Capacitor Selection
          7. 8.2.1.2.7 Input and Output Capacitor Selection
        3. 8.2.1.3 Application Curve
      2. 8.2.2 5-V to 12-V DC-DC Power Conversion With Programmable Feedback Reference Voltage
      3. 8.2.3 12-V SEPIC (Buck-Boost) Converter
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Overview

The TPS61170-Q1 integrates a 40-V low-side FET for providing output voltages up to 38 V. The device regulates the output with current mode PWM (pulse width modulation) control. The switching frequency of the PWM is fixed at 1.2 MHz (typical). The PWM control circuitry turns on the switch at the beginning of each switching cycle. The input voltage is applied across the inductor and stores the energy as the inductor current ramps up. During this portion of the switching cycle, the load current is provided by the output capacitor. When the inductor current rises to the threshold set by the error amplifier output, the power switch turns off and the external Schottky diode is forward biased. The inductor transfers stored energy to replenish the output capacitor and supply the load current. This operation repeats each switching cycle. As shown in the block diagram, the duty cycle of the converter is determined by the PWM control comparator which compares the error amplifier output and the current signal.

A ramp signal from the oscillator is added to the current ramp. This slope compensation ramp is necessary to avoid subharmonic oscillations that are intrinsic to current mode control at duty cycles higher than 50%. The feedback loop regulates the FB pin to a reference voltage through an error amplifier. The output of the error amplifier must be connected to the COMP pin. An external RC compensation network must be connected to the COMP pin to optimize the feedback loop for stability and transient response.