SLVSCD6A December 2015 – January 2021 TPS62097
The input capacitor is the low impedance energy source for the converters which helps to provide stable operation. A low-ESR multilayer ceramic capacitor is required for best filtering and should be placed between PVIN and PGND as close as possible to those pins. For most applications, a 10-μF capacitor is sufficient, though a larger value reduces input current ripple.
The architecture of the TPS62097 allows the use of tiny ceramic output capacitors with low equivalent series resistance (ESR). These capacitors provide low output voltage ripple and are recommended. To keep its low resistance up to high frequencies and to get narrow capacitance variation with temperature, TI recommends to use X7R or X5R dielectrics. The recommended typical output capacitor value is 22 μF and can vary over a wide range as outlined in Table 9-4.
Ceramic capacitors have a DC-Bias effect, which has a strong influence on the final effective capacitance. Choose the right capacitor carefully in combination with considering its package size and voltage rating. Ensure that the input effective capacitance is at least 5 μF and the output effective capacitance is at least 10 μF.