SLVSCD6A December   2015  – January 2021 TPS62097

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Options
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommend Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 100% Duty Cycle Mode
      2. 8.3.2 Switch Current Limit and Hiccup Short Circuit Protection
      3. 8.3.3 Undervoltage Lockout (UVLO)
      4. 8.3.4 Thermal Shutdown
    4. 8.4 Device Function Modes
      1. 8.4.1 Enable and Disable (EN)
      2. 8.4.2 Power Save Mode and Forced PWM Mode (MODE)
      3. 8.4.3 Soft Start-up (SS/TR)
      4. 8.4.4 Voltage Tracking (SS/TR)
      5. 8.4.5 Power Good (PG)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 1.2-V Output Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Setting the Output Voltage
        2. 9.2.2.2 Output Filter Design
        3. 9.2.2.3 Inductor Selection
        4. 9.2.2.4 Capacitor Selection
      3. 9.2.3 Application Performance Curves
      4. 9.2.4 Coincidental Voltage Tracking
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
        3. 9.2.4.3 Application Performance Curve
      5. 9.2.5 Switching Frequency Selection
        1. 9.2.5.1 Design Requirements
        2. 9.2.5.2 Detailed Design Procedure
        3. 9.2.5.3 Application Performance Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
      1. 11.2.1 Thermal Information
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Support Resources
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-866712EF-9D63-4334-BA4F-77C2BDD92A26-low.gifFigure 6-1 11-Pin VQFNRWK Package(Top View)
Table 6-1 Pin Functions
PIN I/O DESCRIPTION
NAME NO.
PGND 1 Power ground pin
SW 2 PWR Switch pin. It is connected to the internal MOSFET switches. Connect the external inductor between this terminal and the output capacitor.
VOS 3 I Output voltage sense pin. This pin must be directly connected to the output capacitor.
FB 4 I Feedback pin. For the fixed output voltage versions, this pin is recommended to be connected to AGND for improved thermal performance. The pin also can be left floating as an internal 400-kΩ resistor is connected between this pin and AGND for fixed output voltage versions. For the adjustable output voltage version, a resistor divider sets the output voltage.
PG 5 O Power-good open-drain output pin. The pullup resistor should not be connected to any voltage higher than 6 V. If it is not used, leave the pin floating.
EN 6 I Enable pin. To enable the device, this pin needs to be pulled high. Pulling this pin low disables the device. This pin has an internal pulldown resistor of typically 375 kΩ when the device is disabled.
PVIN 7 PWR Power input supply pin
AVIN 8 I Analog input supply pin. Connect it to the PVIN pin together.
SS/TR 9 I Soft start-up and voltage tracking pin. A capacitor is connected to this pin to set the soft start-up time. Leaving this pin floating sets the minimum start-up time.
MODE 10 I Mode selection pin. Connect this pin to AGND to enable Power Save Mode with automatic transition between PWM and Power Save Mode. Connect this pin to an external resistor or leave floating to enable forced PWM mode only. See Table 8-1.
AGND 11 Analog ground pin