SLVSFS6A May   2021  – September 2021 TPS629210-Q1

ADVANCE INFORMATION  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Mode Selection and Device Configuration (MODE/S-CONF Pin)
      2. 8.3.2 Adjustable VO Operation (External Voltage Divider)
      3. 8.3.3 Settable VO Operation (VSET and Internal Voltage Divider)
      4. 8.3.4 Smart Enable with Precise Threshold
      5. 8.3.5 Power Good (PG)
      6. 8.3.6 Undervoltage Lockout (UVLO)
      7. 8.3.7 Current Limit and Short Circuit Protection
      8. 8.3.8 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Forced Pulse Width Modulation (PWM) Operation
      2. 8.4.2 AEE (Automatic Efficiency Enhancement)
      3. 8.4.3 Power Save Mode Operation (Auto PFM/PWM)
      4. 8.4.4 100% Duty-Cycle Operation
      5. 8.4.5 Output Discharge Function
      6. 8.4.6 Starting into a Pre-Biased Load
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 External Component Selection
        1. 9.1.1.1 Programming the Output Voltage
        2. 9.1.1.2 Inductor Selection
        3. 9.1.1.3 Capacitor Selection
          1. 9.1.1.3.1 Output Capacitor
          2. 9.1.1.3.2 Input Capacitor
        4. 9.1.1.4 Output Filter and Loop Stability
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
      1. 11.2.1 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Description

The TPS6292xx-Q1 family of devices are highly efficient, small, and highly flexible synchronous step-down DC-DC converters that are easy to use. A wide 3-V to 17-V input voltage range supports a wide variety of systems powered from either 12-V, 5-V, or 3.3-V supply rails, or single-cell or multi-cell Li-Ion batteries. The TPS629210-Q1 can be configured to run at either 2.5-MHz or 1-MHz in a Forced PWM mode or a variable frequency mode. In Auto PFM mode, the device automatically transitions to Power Save mode at light loads to maintain high efficiency. The low 4-µA typical quiescent current also provides high efficiency down to the smallest loads. TI's AEE mode holds a high conversion efficiency through the whole operation range without the need of using different inductors by automatically adjusting the switching frequency based on input and output voltages. In addition to selecting the switching frequency behavior, the MODE/Smart-CONFIG input pin can also be used to select between different combinations of external/internal feedback dividers and enabling/disabling the output voltage discharge capability. In the internal feedback configuration, a resistor between the FB/VSET pin and GND can be used to select between 18 different output voltage options (see Table 8-2).

Device Information
PART NUMBERPACKAGE(1)BODY SIZE (NOM)
TPS629210-Q1SOT583 (8)1.60 mm × 2.10 mm
For all available packages, see the orderable addendum at the end of the data sheet.
GUID-B6BA8963-CA56-4615-B909-5AE56621E1E9-low.gifSimplified Schematic
GUID-20210521-CA0I-QFW6-RSMD-KH1XZ1DPMM8Q-low.pngEfficiency vs Output Current
(12-V to 3.3-V @ 2.5-MHz)