SLVSCO4D July 2015 – February 2019 TPS65917-Q1
The TPS65917-Q1 device includes an external POWERGOOD pin which indicates if the outputs of the SMPS are within the acceptable range of the programmed output voltage, and if the current loading for the SMPS is within the range of the current limit. Users can select whether POWERGOOD reports the result of both voltage and current monitoring or only current monitoring. This selection applies to all SMPSs in the SMPS_POWERGOOD_MASK2 register.POWERGOOD_TYPE_SELECT register. When both the voltage and current are monitored, the POWERGOOD signal indicates whether or not all SMPS outputs are within a certain percentage, as specified by the VSMPSPG parameter, of the programmed value while the load current is below ILIM.
All POWERGOOD sources can be masked in the SMPS_POWERGOOD_MASK1 and SMPS_POWERGOOD_MASK2 registers. By default, only the SMPS1 rail (or SMPS12 rail if in dual phase) is monitored. When an SMPS is disabled, it should be masked in the SMPS_POWERGOOD_MASKx registers to prevent the SMPS from forcing the POWERGOOD pin to go inactive. When the SMPS voltage is transitioning from one target voltage to another because of a DVS command, voltage monitoring is internally masked and POWERGOOD is not impacted.
The GPADC result for SMPS output current monitoring can be included in POWERGOOD by setting the SMPS_COMPMODE bit to 1. The GPADC can monitor only one SMPS.
Figure 5-12 is the block diagram of the circuitry which constructs the logic output of the POWERGOOD pin.
When operating in dual phase, the SMPS12 current monitor may cause POWERGOOD to change to a low level (with default polarity) when transitioning from dual phase operation to single phase operation. TI recommends masking SMPS12 as a POWERGOOD source, using SMPS_POWERGOOD_MASK1, or debouncing the POWERGOOD signal if this POWERGOOD toggle is not desired in the application design.