SLVSD02E March 2015 – August 2021 TPS65982
The input buffer is shown in Figure 9-50. This input buffer is connected to the intermediate nodes between the 1st stage switch and the 2nd stage switch for each port output (C_SBU1/2, C_USB_TP/N, C_USB_BN/P). The input buffer is enabled via firmware when monitoring digital signals and disabled when an analog signal is desired. See theFigure 9-36 section for more detail on the pullup and pulldown resistors of the intermediate node.