SLVSD02E March 2015 – August 2021 TPS65982
On the top layer, create pours for PP_HV, PP_5V0 and VBUS to extend area to place 8 mil hole and 16 mil diameter vias to connect to the bottom layer. A minimum of 4 vias is needed to connect between the top and bottom layer. For the bottom layer, place pours that will connect the PP_HV, PP_5V0, and VBUS capacitors to their respective vias. The external FETS must also be connected through pours and place vias for the external FET gates. For 5 A systems, special consideration must be taken for ensuring enough copper is used to handle the higher current. For 0.5 oz copper top or bottom pours with 0.5-oz plating will require approximately a 120-mil pour width for 5-A support. When routing the 5 A through a 0.5 oz internal layer, more than 200 mil will be required to carry the current. Figure 12-10 and Figure 12-11 show the pours used in this example.