SGLS346A June   2006  – August 2025 TPS73201-EP , TPS73215-EP , TPS73216-EP , TPS73218-EP , TPS73225-EP , TPS73230-EP , TPS73233-EP , TPS73250-EP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2.     Power Dissipation Ratings
    3. 5.2 Electrical Characteristics
    4. 5.3 Typical Characteristics
  7. 6 Functional Block Diagrams
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1  Input and Output Capacitor Requirements
      2. 7.1.2  Output Noise
      3. 7.1.3  Board Layout Recommendation to Improve PSRR and Noise Performance
      4. 7.1.4  Internal Current Limit
      5. 7.1.5  Shutdown
      6. 7.1.6  Dropout Voltage
      7. 7.1.7  Transient Response
      8. 7.1.8  Reverse Current
      9. 7.1.9  Thermal Protection
      10. 7.1.10 Power Dissipation
      11. 7.1.11 Package Mounting
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.1.3 Board Layout Recommendation to Improve PSRR and Noise Performance

To improve ac performance such as PSRR, output noise, and transient response, it is recommended that the PCB be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the GND pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the GND pin of the device.