SBVS336A September 2021 – May 2022 TPS7A94
The NR/SS pin is the input to the inverting terminal of the error amplifier, see the Section 7.2. A resistor connected from this pin to GND sets the output voltage by the pin internal reference current INR/SS, VOUT = INR/SS × RNR/SS. Connecting a capacitor from this pin to GND significantly reduces the output noise, limits the input inrush-current, and soft-starts the output voltage. Use the minimum value or larger capacitor from NR/SS to ground as listed in the Section 6.5 table and place the NR/SS capacitor as close to the NR/SS and GND pins of the device as possible.
The device features a programmable, monotonic, voltage-controlled, soft-start circuit that is set to work with an external capacitor (CNR/SS). In addition to the soft-start feature, the CNR/SS capacitor also lowers the output voltage noise of the LDO. The soft-start feature can be used to eliminate power-up initialization problems. The controlled output voltage ramp also reduces peak inrush current during start up, minimizing start-up transients to the input power bus.
To achieve a monotonic start up, the device output voltage tracks the VNR/SS reference voltage until this reference reaches its set value (the set output voltage). The VNR/SS reference voltage is set by the RNR/SS resistor and, during start up, using a fast charging current (IFAST_SS) in addition to the INR/SS current, as shown in Figure 8-10, to charge the CNR/SS capacitor.
The 2.1-mA (typical) IFAST_SS current and 150 μA (typical) INR/SS current quickly charge CNR/SS until its voltage reaches approximately 93% of the set output voltage, then the IFAST_SS current disengages and only the INR/SS current continues to charge CNR/SS to its set output voltage level. If there is any error during start up or the output overshoot prevention circuit is triggered, the NR/SS discharge FET turns on, thus discharging the CNR/SS capacitor to protect both the LDO and the load.
The soft-start ramp time depends on the fast start-up (IFAST_SS) charging current, the reference current (INR/SS), CNR/SS capacitor value, and the set (targeted) output voltage (VOUT(target)). Equation 3 calculates the soft-start ramp time.
The INR/SS current is provided in the Section 6.5 table and has a value of 150 μA (typical). The IFAST_SS current has a value of 2 mA (typical) for VIN > 2.5 V. Figure 8-11 and Figure 8-12 depict the INR/SS and IFAST_SS current versus VIN and temperature.
Because the error amplifier is always operating in unity-gain configuration, the output voltage noise can only be adjusted by increasing the CNR/SS capacitor. The CNR/SS capacitor and RNR/SS resistor form a low-pass filter (LPF) that filters out the noise from the VNR/SS voltage reference, thereby reducing the device noise floor. The LPF is a single-pole filter and Equation 4 calculates the LPF cutoff frequency. Increasing the CNR/SS capacitor can significantly lower output voltage noise; however, doing so greatly lengthens start-up time. For low-noise applications, use a 4.7-μF CNR/SS for optimal noise and start-up time trade off.
The Section 6.6 section illustrates the impact of the CNR/SS capacitor on the LDO output voltage noise.