SBVS336A September   2021  – May 2022 TPS7A94


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Voltage Setting and Regulation
      2. 7.3.2 Ultra-Low Noise and Ultra-High Power-Supply Rejection Ratio (PSRR)
      3. 7.3.3 Programmable Current Limit and Power-Good Threshold
      4. 7.3.4 Programmable Soft Start (NR/SS Pin)
      5. 7.3.5 Precision Enable and UVLO
      6. 7.3.6 Active Discharge
      7. 7.3.7 Thermal Shutdown Protection (TSD)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
      4. 7.4.4 Current-Limit Operation
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Output Voltage Restart (Overshoot Prevention Circuit)
      2. 8.1.2  Precision Enable (External UVLO)
      3. 8.1.3  Undervoltage Lockout (UVLO) Operation
      4. 8.1.4  Dropout Voltage (VDO)
      5. 8.1.5  Power-Good Feedback (FB_PG Pin) and Power-Good Threshold (PG Pin)
      6. 8.1.6  Adjusting the Factory-Programmed Current Limit
      7. 8.1.7  Programmable Soft-Start and Noise-Reduction (NR/SS Pin)
      8. 8.1.8  Inrush Current
      9. 8.1.9  Optimizing Noise and PSRR
      10. 8.1.10 Adjustable Operation
      11. 8.1.11 Paralleling for Higher Output Current and Lower Noise
      12. 8.1.12 Recommended Capacitor Types
      13. 8.1.13 Load Transient Response
      14. 8.1.14 Power Dissipation (PD)
      15. 8.1.15 Estimating Junction Temperature
      16. 8.1.16 TPS7A94EVM-046 Thermal Analysis
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout
      2. 10.1.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. Evaluation Modules
        2. Spice Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Mechanical Data

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DSC|10
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Output Voltage Restart (Overshoot Prevention Circuit)

Wide bandwidth linear regulators suffer from an undesirable excessive overshooting of the output voltage during restart events that occur when the CNR/SS and COUT capacitors are not fully discharged. In this device, and as shown in Figure 8-1, this undesirable behavior is mitigated by implementing low hysteresis circuitry consisting of two ORed comparators to detect when the input voltage is either 20 mV (typical) lower than the VNR/SS reference voltage or 300 mV (typical) lower than VOUT.

GUID-20210430-CA0I-44CM-5S61-SN43KGXGP2SL-low.gif Figure 8-1 Overshoot Prevention Circuit

When the device is operating in dropout, transient events (such as an input voltage brownout, heavy load transient, or short-circuit event) can force the device in a reversed bias condition where the input voltage is either 20 mV (typical) lower than the VNR/SS reference voltage or 300 mV (typical) lower than VOUT. The output overshoot prevention circuit can be triggered, as shown in Figure 8-2, thus forcing the device to shutdown and restart, thereby preventing output voltage overshoot. If the device is still operating in dropout and the error condition that triggered this circuit is still present, an additional restart can occur until these conditions are removed or the device is no longer in dropout. The restart always occurs from a discharged state and always has the same characteristics as the initial LDO power-up, so the start-up time, VOUT ramp rate, and VOUT monotonicity are all predictable.

GUID-20210427-CA0I-CTFX-81X2-K0KTSFK4N8T6-low.gif Figure 8-2 Device Behavior in Dropout

Figure 8-3 and Figure 8-4 show examples of a soft brownout and a brownout event, respectively.

The brownout overshoot is present with higher VIN slew rates. A 1-V/μs slew rate was used in Figure 8-5.

GUID-20220308-SS0I-8M4M-4MFT-5TCWW0V9SHKC-low.pngFigure 8-3 Example: Soft Brownout to VNR/SS
GUID-20220323-SS0I-JGLX-WRXK-VC0SXWGLT1F5-low.pngFigure 8-5 Example: Brownout With Overshoot Recovery
GUID-20220308-SS0I-PDM0-5JFP-DQJ7G45N60FD-low.pngFigure 8-4 Example: Brownout

The overshoot prevention circuit is implemented to ensure a predictable start-up and shutdown of the device without output overshoot if the EN_UV external UVLO is not used as described in this section. This circuit can be prevented from triggering by:

  1. Using an input supply capable of handling heavy load transients or a larger value input capacitor
  2. Increasing the operating headroom between VIN and VOUT (for example, when using a battery as an input supply to ensure that VIN stays higher than VOUT even when the battery is near its full discharge state)
  3. Using an input supply with a ramp rate faster than the set output voltage time constant formed by CNR/SS || RNR/SS
  4. Discharging the input supply slower than the discharge time formed by COUT || (Load || RPULLDOWN) or by the CNR/SS || (RNR/SS || RPULLDOWN_NR/SS)