SLVSJH7 October   2025 TPS7E67-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Enable (EN)
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Power-Good (PG)
      4. 6.3.4 Adjustable Power-Good Delay Timer (DELAY)
      5. 6.3.5 Undervoltage Lockout
      6. 6.3.6 Thermal Shutdown
      7. 6.3.7 Foldback Current Limit
      8. 6.3.8 Power Limit
      9. 6.3.9 Output Pulldown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Functional Mode Comparison
      2. 6.4.2 Normal Operation
      3. 6.4.3 Dropout Operation
      4. 6.4.4 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Adjustable Device Feedback Resistor Selection
      2. 7.1.2 Recommended Capacitor Types
      3. 7.1.3 Input and Output Capacitor Selection
      4. 7.1.4 Reverse Current
      5. 7.1.5 Feed-Forward Capacitor
      6. 7.1.6 Dropout Voltage
      7. 7.1.7 Estimating Junction Temperature
      8. 7.1.8 Power Dissipation (PD)
      9. 7.1.9 Power Dissipation Versus Ambient Temperature
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Choose Feedback Resistors
      3. 7.2.3 Setting the Adjustable Power-Good Delay
      4. 7.2.4 Power Supply Recommendations
      5. 7.2.5 Layout
        1. 7.2.5.1 Layout Guidelines
        2. 7.2.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.2.3 Setting the Adjustable Power-Good Delay

The power-good delay time can be set in two ways: either by floating the DELAY pin or by connecting a capacitor from this pin to GND. When the DELAY pin is floating, the time defaults to tDELAY(PG), listed in Section 5.5. The delay time is set by the following equation if a capacitor is connected between the DELAY pin and GND.

Equation 19. t   =   t D e l a y ( P G )   +   C D E L A Y V P G D L _ T H I P G D L _ C H G