SLVSJH7 October   2025 TPS7E67-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Enable (EN)
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Power-Good (PG)
      4. 6.3.4 Adjustable Power-Good Delay Timer (DELAY)
      5. 6.3.5 Undervoltage Lockout
      6. 6.3.6 Thermal Shutdown
      7. 6.3.7 Foldback Current Limit
      8. 6.3.8 Power Limit
      9. 6.3.9 Output Pulldown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Functional Mode Comparison
      2. 6.4.2 Normal Operation
      3. 6.4.3 Dropout Operation
      4. 6.4.4 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Adjustable Device Feedback Resistor Selection
      2. 7.1.2 Recommended Capacitor Types
      3. 7.1.3 Input and Output Capacitor Selection
      4. 7.1.4 Reverse Current
      5. 7.1.5 Feed-Forward Capacitor
      6. 7.1.6 Dropout Voltage
      7. 7.1.7 Estimating Junction Temperature
      8. 7.1.8 Power Dissipation (PD)
      9. 7.1.9 Power Dissipation Versus Ambient Temperature
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Choose Feedback Resistors
      3. 7.2.3 Setting the Adjustable Power-Good Delay
      4. 7.2.4 Power Supply Recommendations
      5. 7.2.5 Layout
        1. 7.2.5.1 Layout Guidelines
        2. 7.2.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The TPS7E67-Q1 low-dropout (LDO) linear voltage regulator is a low quiescent current device designed to connect to the battery in the automotive applications and supports wide input voltage range from 3V to 40V. The wide output range is from 1.2V to 38V for the adjustable configuration and 1.8V to 12V for the fixed configuration and up-to 300mA of load current. With only an 2.8µA quiescent current at no-load, the device is an good design for powering always-on components such as microcontrollers (MCUs), gate drivers and controller area network (CAN) transceivers in standby systems.

The TPS7E67-Q1 supports very tight DC accuracy of ±1.2% over line, load and temperature range. The device responds quickly to line and load transients and controls quiescent current in dropout operation.

The TPS7E67-Q1 is equipped with power-good for monitoring of the output voltage. The power-good delay can be adjusted by using external capacitors. The LDO has built-in protection mechanism for over-current, over-temperature and over-power delivery for reliable operation of the LDO. The TPS7E67-Q1 is stable with an output capacitor range of 4.7μF to 100μF.

The TPS7E67-Q1 is available in a 2.0mm × 2.0mm, 6-pin WSON (wettable flank) (DRV-WF), 3.0mm × 4.9mm and 8-pin HVSSOP (DGN) package for fixed and adjustable outputs.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
TPS7E67-Q1DRV (WSON, 6)2.0mm × 2.0mm
DGN (HVSSOP, 8)3.0mm × 4.9mm
(1) For more information, see the Mechanical, Packaging, and Orderable Information.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
TPS7E67-Q1 Typical ApplicationTypical Application