JAJSL70A February   2021  – January 2024 BQ25730

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. 概要 (続き)
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics(BQ25730)
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Power-Up Sequence
      2. 8.3.2  Two-Level Battery Discharge Current Limit
      3. 8.3.3  Fast Role Swap Feature
      4. 8.3.4  CHRG_OK Indicator
      5. 8.3.5  Input and Charge Current Sensing
      6. 8.3.6  Input Voltage and Current Limit Setup
      7. 8.3.7  Battery Cell Configuration
      8. 8.3.8  Device HIZ State
      9. 8.3.9  USB On-The-Go (OTG)
      10. 8.3.10 Converter Operation
      11. 8.3.11 Inductance Detection Through IADPT Pin
      12. 8.3.12 Converter Compensation
      13. 8.3.13 Continuous Conduction Mode (CCM)
      14. 8.3.14 Pulse Frequency Modulation (PFM)
      15. 8.3.15 Switching Frequency and Dithering Feature
      16. 8.3.16 Current and Power Monitor
        1. 8.3.16.1 High-Accuracy Current Sense Amplifier (IADPT and IBAT)
        2. 8.3.16.2 High-Accuracy Power Sense Amplifier (PSYS)
      17. 8.3.17 Input Source Dynamic Power Management
      18. 8.3.18 Input Current Optimizer (ICO)
      19. 8.3.19 Two-Level Adapter Current Limit (Peak Power Mode)
      20. 8.3.20 Processor Hot Indication
        1. 8.3.20.1 PROCHOT During Low Power Mode
        2. 8.3.20.2 PROCHOT Status
      21. 8.3.21 Device Protection
        1. 8.3.21.1 Watchdog Timer
        2. 8.3.21.2 Input Overvoltage Protection (ACOV)
        3. 8.3.21.3 Input Overcurrent Protection (ACOC)
        4. 8.3.21.4 System Overvoltage Protection (SYSOVP)
        5. 8.3.21.5 Battery Overvoltage Protection (BATOVP)
        6. 8.3.21.6 Battery Discharge Overcurrent Protection (BATOC)
        7. 8.3.21.7 Battery Short Protection (BATSP)
        8. 8.3.21.8 System Undervoltage Lockout (VSYS_UVP) and Hiccup Mode
        9. 8.3.21.9 Thermal Shutdown (TSHUT)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Forward Mode
        1. 8.4.1.1 System Voltage Regulation with Narrow VDC Architecture
        2. 8.4.1.2 Battery Charging
      2. 8.4.2 USB On-The-Go
      3. 8.4.3 Pass Through Mode (PTM)-Patented Technology
    5. 8.5 Programming
      1. 8.5.1 I2C Serial Interface
        1. 8.5.1.1 Timing Diagrams
        2. 8.5.1.2 Data Validity
        3. 8.5.1.3 START and STOP Conditions
        4. 8.5.1.4 Byte Format
        5. 8.5.1.5 Acknowledge (ACK) and Not Acknowledge (NACK)
        6. 8.5.1.6 Target Address and Data Direction Bit
        7. 8.5.1.7 Single Read and Write
        8. 8.5.1.8 Multi-Read and Multi-Write
        9. 8.5.1.9 Write 2-Byte I2C Commands
    6. 8.6 Register Map
      1. 8.6.1  ChargeOption0 Register (I2C address = 01/00h) [reset = E70Eh]
      2. 8.6.2  ChargeCurrent Register (I2C address = 03/02h) [reset = 0000h]
        1. 8.6.2.1 Battery Pre-Charge Current Clamp
      3. 8.6.3  ChargeVoltage Register (I2C address = 05/04h) [reset value based on CELL_BATPRESZ pin setting]
      4. 8.6.4  ChargerStatus Register (I2C address = 21/20h) [reset = 0000h]
      5. 8.6.5  ProchotStatus Register (I2C address = 23/22h) [reset = B800h]
      6. 8.6.6  IIN_DPM Register (I2C address = 25/24h) [reset = 4100h]
      7. 8.6.7  ADCVBUS/PSYS Register (I2C address = 27/26h)
      8. 8.6.8  ADCIBAT Register (I2C address = 29/28h)
      9. 8.6.9  ADCIIN/CMPIN Register (I2C address = 2B/2Ah)
      10. 8.6.10 ADCVSYS/VBAT Register (I2C address = 2D/2Ch)
      11. 8.6.11 ChargeOption1 Register (I2C address = 31/30h) [reset = 3F00h]
      12. 8.6.12 ChargeOption2 Register (I2C address = 33/32h) [reset = 00B7]
      13. 8.6.13 ChargeOption3 Register (I2C address = 35/34h) [reset = 0434h]
      14. 8.6.14 ProchotOption0 Register (I2C address = 37/36h) [reset = 4A81h(2S~5s) 4A09(1S)]
      15. 8.6.15 ProchotOption1 Register (I2C address = 39/38h) [reset = 41A0h]
      16. 8.6.16 ADCOption Register (I2C address = 3B/3Ah) [reset = 2000h]
      17. 8.6.17 ChargeOption4 Register (I2C address = 3D/3Ch) [reset = 0048h]
      18. 8.6.18 Vmin Active Protection Register (I2C address = 3F/3Eh) [reset = 006Ch(2s~5s)/0004h(1S)]
      19. 8.6.19 OTGVoltage Register (I2C address = 07/06h) [reset = 09C4h]
      20. 8.6.20 OTGCurrent Register (I2C address = 09/08h) [reset = 3C00h]
      21. 8.6.21 InputVoltage(VINDPM) Register (I2C address = 0B/0Ah) [reset =VBUS-1.28V]
      22. 8.6.22 VSYS_MIN Register (I2C address = 0D/0Ch) [reset value based on CELL_BATPRESZ pin setting]
      23. 8.6.23 IIN_HOST Register (I2C address = 0F/0Eh) [reset = 2000h]
      24. 8.6.24 ID Registers
        1. 8.6.24.1 ManufactureID Register (I2C address = 2Eh) [reset = 40h]
        2. 8.6.24.2 Device ID (DeviceAddress) Register (I2C address = 2Fh) [reset = D5h]
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input Snubber and Filter for Voltage Spike Damping
        2. 9.2.2.2 ACP-ACN Input Filter
        3. 9.2.2.3 Inductor Selection
        4. 9.2.2.4 Input Capacitor
        5. 9.2.2.5 Output Capacitor
        6. 9.2.2.6 Power MOSFETs Selection
      3. 9.2.3 Application Curves
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
      1. 11.2.1 Layout Example Reference Top View
      2. 11.2.2 Inner Layer Layout and Routing Example
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 サード・パーティ製品に関する免責事項
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 サポート・リソース
    5. 12.5 Trademarks
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 用語集
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Register Map

Table 8-7 Charger Command Summary
I2C ADDR
(MSB/LSB)
REGISTER NAME TYPE DESCRIPTION LINKS
01/00h ChargeOption0() R/W Charge Option 0 Go
03/02h ChargeCurrent() R/W 7-bit charge current setting
LSB 128 mA, Range 0 mA – 16256 mA (RSR=5mΩ)
Go
05/04h ChargeVoltage() R/W 12-bit charge voltage setting
LSB 8 mV, Default: 1S-4200mV, 2S-8400mV, 3S-12600mV, 4S-16800mV, 5S-21000mV
Go
07/06h OTGVoltage() R/W 12-bit OTG voltage setting
LSB 8 mV, Range: 3000 mV – 24000 mV
Go
09/08h OTGCurrent() R/W 7-bit OTG output current setting
LSB 100 mA, Range: 0 A – 12700 mA (RAC=5mΩ)
Go
0B/0Ah InputVoltage() R/W 8-bit input voltage setting
LSB 64 mV, Range: 3200 mV – 19520 mV
Go
0D/0Ch VSYS_MIN() R/W 8-Bit minimum system voltage setting
LSB: 100 mV, Range: 1000 mV - 23000 mV
Default: 1S-3.6V, 2S-6.6V, 3S-9.2V, 4S-12.3V, 5S-15.4V
Go
0F/0Eh IIN_HOST() R/W 6-bit Input current limit set by host
LSB: 100 mA, Range: 100 mA - 10000 mA with 100 mA offset (RAC=5mΩ)
Go
21/20h ChargerStatus() R with R/W bits Charger Status Go
23/22h ProchotStatus() R and R/W bits Prochot Status Go
25/24h IIN_DPM() R 7-bit input current limit in use
LSB: 100 mA, Range: 100 mA - 10000 mA (RAC=5mΩ)
Go
27/26h ADCVBUS/PSYS() R 8-bit digital output of input voltage,
8-bit digital output of system power
PSYS: Full range: 3.06 V, LSB: 12 mV
VBUS: Full range: 0 V - 24.48 V, LSB 96 mV
Go
29/28h ADCIBAT() R 7-bit digital output of battery charge current,
7-bit digital output of battery discharge current
ICHG: Full range 16.256 A, LSB 128 mA
IDCHG: Full range: 65.024 A, LSB: 512 mA (RSR=5mΩ)
Go
2B/2Ah ADCIINCMPIN() R 8-bit digital output of input current,
8-bit digital output of CMPIN voltage
POR State - IIN: Full range: 25.5 A, LSB 100 mA (RAC=5mΩ)
CMPIN: Full range 3.06 V, LSB: 12 mV
Go
2D/2Ch ADCVSYSVBAT() R 8-bit digital output of system voltage,
8-bit digital output of battery voltage
VSYS: Full range: 2.88 V - 19.2 V, LSB: 64 mV (1S-4S)
VSYS: Full range: 8.16 V - 24.48 V, LSB: 64 mV (5S)
VBAT: Full range : 2.88 V - 19.2 V, LSB 64 mV (1S-4S)
VBAT: Full range : 8.16 V - 24.48 V, LSB 64 mV (5S)
Go
2Eh ManufacturerID() R Manufacturer ID - 0x0040H Go
2Fh DeviceID() R Device ID Go
31/30h ChargeOption1() R/W Charge Option 1 Go
33/32h ChargeOption2() R/W Charge Option 2 Go
35/34h ChargeOption3() R/W Charge Option 3 Go
37/36h ProchotOption0() R/W PROCHOT Option 0 Go
39/38h ProchotOption1() R/W PROCHOT Option 1 Go
3B/3Ah ADCOption() R/W ADC Option Go
3D/3Ch ChargeOption4() R/W Charge Option 4 Go
3F/3Eh Vmin Active Protection() R/W Vmin Active Protection Go