JAJSSF8 December 2023 LDC5071-Q1
PRODUCTION DATA
The LDC5071-Q1 is driven by a state machine. The state machine is initialized upon power up, and the machine goes through the initial diagnostics routines. If the system functions normally, the device moves to a normal operational state and starts to drive the OUT pin to indicate angular information. In case of a fault, the device moves to the FAULT state, the LC oscillator driver is disabled, and the OUT pins are tri-stated to indicate fault condition until the FAULT condition is removed or the IC is power-cycled. Some critical faults will lead to the disabled state, which requires a power cycle to recover.
Figure 6-5 shows the different device states. The management of faults is divided into four types of faults as shown in Table 6-1:
RESET FAULTS | INITIALIZATION FAULTS | RUN TIME FAULTS # 1 | RUN TIME FAULTS # 2 |
---|---|---|---|
VREG UNDER VOLTAGE CHECK | EE CRC CHECK | VREG OV CHECK(1) | CRITICAL REGISTERS REDUNDANCY CHECK |
DVDD UNDER VOLTAGE CHECK | LBIST CHECK | OUTPUT SIGNAL VOLTAGE CHECK | REGISTER CRC CHECK |
ABIST CHECK | TM0 PULL UP CHECK | ||
SENSOR INTERFAFE BIST CHECK | T0UT PULL UP CHECK | ||
VREG CAP LOSS CHECK | AGC_EN TOGGLE CHECK | ||
AGC_EN BIST CHECK |
Figure 6-5 shows the states and the transitions for the LDC5071-Q1. Following states are considered SAFE state where the device has detected a fault and indicates a fault making all the OUT pins high-impedance: