In this configuration the current sense has an internal feedback to the peak current limit of the device. The ILIM circuit regulates the peak current limit down as long as the differential voltage between ISNSP and ISNSN exceeds the internal offset voltage of the ILIM circuit. The ILIM threshold can be set via the register programming or via the an ISET resistor in the ILIMCOMP pin.

If the threshold for the current limit is set by the internal DAC the bandwidth of the current limit can be optimized for different with a resistor and capacitor on the ILIMCOMP - pin. It is recommended to select the compensation bandwidth according the following equations

If the current limit threshold is selected by a resistor a internal comparator monitors the voltage on the ILIMCOMP pin. If the voltage exceeds the ISET threshold the current limit is reached. The threshold voltage for ISET can be calculated with: ${V_{\left(\mathrm{ISET}\right)}=(V_{\left(ISNSP\right)}-V_{\left(ISNSN\right)})\times {gm}_{\left(\mathrm{ILIMCOMP}\right)}\times R}_{\left(\mathrm{ILIMCOMP}\right)}$

The current through the sense resistor can be monitored by the CDC pin simultaneously.

The read-out register value of the ''ILIM_THRESHOLD" control register is clamped for the lower and for the upper limit of the register range.

• The reg. readout value is clamped to the lowest clamp current ( e.g. 500mA) if a register value below the value of clamp current been written in before.
• The reg. readout value is clamped to the highest clamp current if a register value above the highest value of clamp current has been written in before.