JAJSPB7 February   2024 TMP110

ADVANCE INFORMATION  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Related Products
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Digital Temperature Output
      2. 7.3.2 Decoding Temperature Data
      3. 7.3.3 Temperature Limits and Alert
    4. 7.4 Device Functional Modes
      1. 7.4.1 Continuous-Conversion Mode
      2. 7.4.2 One-Shot Mode
    5. 7.5 Programming
      1. 7.5.1 Serial Interface
      2. 7.5.2 Bus Overview
      3. 7.5.3 Device Address
      4. 7.5.4 Bus Transactions
        1. 7.5.4.1 Writes
        2. 7.5.4.2 Reads
        3. 7.5.4.3 General Call Reset Function
        4. 7.5.4.4 SMBus Alert Response
        5. 7.5.4.5 Time-Out Function
        6. 7.5.4.6 Coexist on I3C Mixed Bus
  9. Register Map
    1. 8.1 Temp_Result Register (address = 00h) [reset = xxxxh]
    2. 8.2 Configuration Register (address = 01h) [reset = 60A0h]
    3. 8.3 TLow_Limit Register (address = 02h) [reset = 4B00h]
    4. 8.4 THigh_Limit Register (address = 03h) [reset = 5000h]
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Separate I2C Pullup and Supply Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
    3. 9.3 Equal I2C Pullup and Supply Application
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Layout Example

There are special considerations that need to be taken for the TMP110 X2SON package. These considerations are due to the center pad being electrically connected to either address or alert (depending on the orderables shown in Table 7-8) and because of the dimensions of the package and the pads. With the address option, the center pad can be directly connected with a trace on the same layer to the desired pin of the device as shown in Figure 9-3.

GUID-20240130-SS0I-9FVW-RMQB-2MKZ5FDNH4BH-low.svgFigure 9-3 ADD0 Pin Layout Example
GUID-20240130-SS0I-VVJJ-WLKD-C8DGHNMBZ9KW-low.svgFigure 9-4 ALERT Pin Layout Example

When using the ALERT pin of the device, this signal can be either routed out in between the pads or on a different layer using a via within the center pad as shown in Figure 9-4. Both of these methods have constraints that must be considered as explained below. Ultimately, choosing one of these methods depends on the specifications of the board manufacturing process:

  • Routing in between pads introduces trace clearance and trace width limitations. As the maximum space between pads is 0.26 mm (10.2 mil), assuming a trace width of 0.1 mm (4 mil) limits the minimum clearance to 0.08 mm (3.15 mil).
  • Routing on a different layer using a via has specific benefits to the user application. For instance, minimum trace clearance and trace width are higher but require a via on the center pad with specific dimensions. The via diameter must be less than 0.305 mm (13.78 mil) to keep the via smaller than the center pad and a minimum drill diameter of 0.1 mm (4 mil) can be assumed to avoid manufacturing issues. With this scenario, a minimum annular ring width specification of 0.125mm (5 mil) is required: Anullar Ring Width (mm) = (0.305-0.1)/2.
GUID-20240110-SS0I-X9MK-SGKF-FVJQZC6KM5JB-low.svgFigure 9-5 X2SON-5 (DPW) Package Center Pin Layout Option 1
GUID-20240110-SS0I-CPC1-B4KF-PMNJBGLTKNWW-low.svgFigure 9-6 X2SON-5 (DPW) Package Center Pin Layout Option 2