JAJSPB7 February 2024 TMP110
ADVANCE INFORMATION
For a read operation the controller sends a START condition, followed by the target address with the R/W bit set to 0b (signifying a write). The target acknowledges the write request, and the controller sends the Register Pointer. The controller initiates a restart followed by the target address with the R/W bit set to 1b (signifying a read). The controller continues to send out clock pulses but releases the SDA line so that the target can transmit data. At the end of every byte of data, the controller sends an ACK to the target, letting the target know that the controller is ready for more data. Once the controller has received the expected number of bytes, the controller sends a NACK, signaling to the target to halt communications and release the SDA line. The controller follows this up with a STOP condition. Figure 7-10 shows an example of reading a single word from a target register.