JAJSES8B October 2017 – November 2018 TPS2372
The TPS2372 pulls DEN to VSS whenever V(VDD-VSS) is below the lower classification threshold. When the input voltage rises above VCL_ON, the DEN pin goes to an open-drain condition to conserve power. While in detection, RTN is high impedance, and almost all the internal circuits are disabled. An RDEN of 24.9 kΩ (±1%), presents the correct signature. It may be a small, low-power resistor because it only sees a stress of about 5 mW. A valid PD detection signature is an incremental resistance ( ΔV / ΔI ) from 23.7 kΩ to 26.3 kΩ at the PI.
The detection resistance seen by the PSE at the PI is the result of the input bridge resistance in series with the parallel combination of RDEN and internal VDD loading. The input diode bridge’s incremental resistance may be hundreds of Ω at the low currents drawn when 2.7 V is applied to the PI. The input bridge resistance is partially compensated by the TPS2372 effective resistance during detection.
The hardware classification protocol of IEEE 802.3bt specifies that a Type 2, 3 or 4 PSE drops its output voltage into the detection range during the classification sequence. The PD is required to have an incorrect detection signature in this condition, which is referred to as a mark event (see Figure 17). After the first mark event, the TPS2372 will present a signature less than 12 kΩ until it has experienced a V(VDD-VSS) voltage below the mark reset threshold (VMSR). This is explained more fully under Hardware Classification.