The LP8756x-Q1 PMIC has many interrupt signals used to indicate different events including regulator overcurrent events, regulator PGOOD events, regulator short-circuit events, and clock events. The registers containing all of these interrupts are listed as follows:

• INT_TOP1 register
• INT_TOP2 register
• INT_BUCK_0_1 register
• INT_BUCK_2_3 register

These interrupts can be masked or unmasked using the registers below. For the default mask settings, see the device-specific TRM. When RESET_REG_INT bit is unmasked, this allows the MCU to know when the PMIC registers are reset to the values determined by the OTP, so the MCU takes the necessary actions to verify that the PMIC is configured as needed. Unmask other interrupts as needed. If multiple interrupts are unmasked, read the interrupt registers to determine the specific cause when an interrupt is generated on the nINT line.

• TOP_MASK1 register
• TOP_MASK2 register
• BUCK_0_1_MASK register
• BUCK_2_3_MASK register