SNVU596A October   2018  – July 2025 LP87521-Q1 , LP87522-Q1 , LP87523-Q1 , LP87524-Q1 , LP87525-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Setup
    1. 2.1 SCL/SDA Pins
    2. 2.2 NRST Pin
    3. 2.3 ENx (GPIOx) Pins
    4. 2.4 nINT
  6. 3Configuration
    1. 3.1 Configuration Sequence
    2. 3.2 Default OTP Configurations
    3. 3.3 Recommended Order of Configuring Registers Through I2C
      1. 3.3.1 Voltage Settings
      2. 3.3.2 Other Regulator Settings
      3. 3.3.3 GPO Settings
      4. 3.3.4 Clock Sync Functions
      5. 3.3.5 PGOOD Settings
      6. 3.3.6 Interrupt Settings
      7. 3.3.7 Startup and Shutdown Sequence
      8. 3.3.8 Set ENx Pin Control Bits
      9. 3.3.9 Set EN_BUCKx Bits
  7. 4Revision History

3.3.2 Other Regulator Settings

Each buck has 2 CTRL registers that can be used to set slew rates as well as enable their output discharge resistors or set auto/forced PWM mode and auto/forced multiphase mode. Included in these registers is an EN_PIN_CTRLx, EN_BUCKx, and BUCKx_EN_PIN_SELECT[1:0] bits for each regulator. It is recommended to set the EN_PIN_CTRLx, EN_BUCKx, and BUCKx_EN_PIN_SELECT[1:0] bits last to avoid any regulators turning on before configuration is complete. These regulator setting fields are summarized in Figure 2-1. For a full description of all registers and their settings, see the device-specific data sheet.

Table 3-7 Regulator Control Settings Registers
Regulator Register Fields that are expected to already be configured Fields to configure when the PMIC is ready to be powered up (Section 3.3.8)
BUCK0 BUCK0_CTRL_1 EN_ROOF_FLOOR0, EN_RDIS0, BUCK0_FPWM, BUCK0_FPWM_MP BUCK0_EN_PIN _CTRL, EN_BUCK0, BUCK_0_EN_PIN_SELECT[1:0]
BUCK0_CTRL_2 SLEW_RATE0[1:0]
BUCK1 BUCK1_CTRL_1 EN_ROOF_FLOOR1, EN_RDIS1, BUCK1_FPWM BUCK1_EN_PIN _CTRL, EN_BUCK1, BUCK_1_EN_PIN_SELECT[1:0]
BUCK1_CTRL_2 SLEW_RATE1[1:0]
BUCK2 BUCK2_CTRL_1 EN_ROOF_FLOOR2, EN_RDIS2, BUCK2_FPWM, BUCK2_FPWM_MP BUCK2_EN_PIN _CTRL, EN_BUCK2, BUCK_2_EN_PIN_SELECT[1:0]
BUCK2_CTRL_2 SLEW_RATE2[1:0]
BUCK3 BUCK3_CTRL_1 EN_ROOF_FLOOR3, EN_RDIS3, BUCK3_FPWM BUCK3_EN_PIN _CTRL, EN_BUCK3, BUCK_3_EN_PIN_SELECT[1:0]
BUCK3_CTRL_2 SLEW_RATE3[1:0]