DLPS289 Data sheet

DLPS289A June 2025 – September 2025 DLP391TP

PRODUCTION DATA

5.4 Recommended Operating Conditions

Over operating free-air temperature range and supply voltages (unless otherwise noted). The functional performance of the device specified in this data sheet is achieved when operating the device within the limits defined by the Recommended
Operating Conditions. No level of performance is implied when operating the device above or below the Recommended Operating Conditions limits.

PARAMETER		MIN	TYP	MAX	UNIT
SUPPLY VOLTAGE RANGE
V_DD	Supply voltage for LVCMOS core logic Supply voltage for LPSDR low-speed interface ⁽¹⁾⁽²⁾	1.71	1.8	1.95	V
V_DDI	Supply voltage for SubLVDS receivers ⁽¹⁾⁽²⁾	1.71	1.8	1.95	V
V_OFFSET	Supply voltage for HVCMOS and micromirror electrode ⁽¹⁾⁽²⁾⁽³⁾	9.5	10	10.5	V
V_BIAS	Supply voltage for mirror electrode ⁽¹⁾⁽²⁾	17.5	18	18.5	V
V_RESET	Supply voltage for micromirror electrode ⁽¹⁾⁽²⁾	–14.5	–14	–13.5	V
\| V_DDI - V_DD \|	Supply voltage delta (absolute value) ⁽¹⁾⁽²⁾⁽⁴⁾			0.3	V
\| V_BIAS-V_OFFSET \|	Supply voltage delta (absolute value) ⁽¹⁾⁽²⁾⁽⁵⁾			10.5	V
\| V_BIAS - V_RESET \|	Supply voltage delta (absolute value) ⁽¹⁾⁽²⁾⁽⁶⁾			33	V
LPSDR INTERFACE
V_IH	High-level input voltage	0.7 × V_DD			V
V_IL	Low-level input voltage			0.3 x V_DD	V
V_IH(AC)	AC input high voltage	0.8 × V_DD		V_DD + 0.3	V
V_IL(AC)	AC input low voltage	–0.3		0.2 × V_DD	V
VHyst	Input Hysteresis	0.1 × V_DD		0.4 × V_DD	V
f_{max_LS}	Clock frequency for low speed interface LS_CLK ⁽⁷⁾	108		130	MHz
DCD_IN	LSIF duty cycle distortion (LS_CLK) ⁽⁷⁾	44		56	%
SUBLVDS INTERFACE
f_{max_HS}	Clock frequency for high-speed interface DCLK ⁽⁸⁾			720	MHz
DCD_IN	LVDS duty cycle distortion (DCLK)	48		52	%
\| V_ID \|	LVDS differential input voltage magnitude ⁽⁸⁾	150	250	350	mV
V_CM	Common mode voltage ⁽⁸⁾	700	900	1100	mV
V_SUBLVDS	SubLVDS voltage ⁽⁸⁾	525		1275	mV
Z_IN	Internal differential termination resistance	80	100	120	Ω
TEMPERATURE DIODE
I_{TEMP_DIODE}	Max current source into Temperature Diode			120	µA
ENVIRONMENTAL
T_ARRAY	Array temperature, long-term operation ⁽⁹⁾⁽¹⁰⁾⁽¹¹⁾⁽¹²⁾	0		40 to 70	°C
T_DP-AVG	Average dew point temperature, (non-condensing)⁽¹³⁾			28	°C
T_DP-ELR	Elevated dew point temperature range, (non-condensing)⁽¹⁴⁾		28	36	°C
CT_ELR	Cumulative time in elevated dew point temperature range			24	months
Q_AP-ILL	Window aperture illumination overfill ⁽¹⁵⁾⁽¹⁶⁾⁽¹⁷⁾			17	W/cm²
ILLUMINATION
ILL_UV	Illumination power at wavelengths < 410nm ⁽⁹⁾⁽¹⁹⁾			10	mW/cm²
ILL_VIS	Illumination power at wavelengths ≥ 410nm and ≤ 800nm ⁽¹⁸⁾⁽¹⁹⁾			40	W/cm²
ILL_IR	Illumination power at wavelengths > 800nm ⁽¹⁹⁾			10	mW/cm²
ILL_BLU	Illumination power at wavelengths ≥ 410nm and ≤ 475nm ⁽¹⁸⁾⁽¹⁹⁾			12.8	W/cm²
ILL_BLU1	Illumination power at wavelengths ≥ 410nm and ≤ 440nm ⁽¹⁸⁾⁽¹⁹⁾			2.0	W/cm²

(1) The following power supplies are all required to operate the DMD: V_DD, V_DDI, V_OFFSET, V_BIAS, and V_RESET. All VSS connections are also required.

(2) All voltage values are with respect to the ground pins (VSS).

(3) VOFFSET supply transients must fall within the specified max voltages.

(4) To prevent excess current, the supply voltage delta |V_DDI – V_DD| must be less than the specified limit.

(5) To prevent excess current, the supply voltage delta |V_BIAS – V_OFFSET| must be less than the specified limit.

(6) To prevent excess current, the supply voltage delta |V_BIAS – V_RESET| must be less than the specified limit.

(7) LS_CLK must run as specified to ensure internal DMD timing for reset waveform commands.

(8) Refer to the SubLVDS timing requirements in Timing Requirements.

(9) Simultaneous exposure of the DMD to the maximum Recommended Operating Conditions for temperature and UV illumination reduces device lifetime.

(10) The array temperature cannot be measured directly and must be computed analytically from the temperature measured at test point (TP1) shown in Figure 6-2 and the package thermal resistance using the Micromirror Array Temperature Calculation

(11) Long-term is defined as the usable life of the device.

(12) Per Figure 5-1, the maximum operational array temperature is derated based on the micromirror landed duty cycle that the DMD experiences in the end application. See Micromirror Landed-on/Landed-off Duty cycle for a definition of micromirror landed duty cycle.

(13) The average over time (including storage and operating) is that the device is not in the elevated dew point temperature range.

(14) Exposure to dew point temperatures in the elevated range during storage and operation is limited to less than a total cumulative time of CT_ELR.

(15) Applies to the region defined in Figure 5-2

(16) The active area of the DMD is surrounded by an aperture on the inside of the DMD window surface that masks structures of the DMD device assembly for normal view. The aperture is sized to anticipate several optical conditions. Overfill light illuminating the area outside the active array can scatter and create adverse effects on the performance of an end application using the DMD. Minimizing the light flux incident outside the active array is a design requirement of the illumination optical system. Depending on the particular optical architecture and assembly tolerances of the optical system, the amount of overfill light on the outside of the active array may cause system performance degradation.

(17) To calculate, see Window Aperture Illumination Overfill Calculation.

(18) The maximum allowable optical power incident on the DMD is limited by the maximum optical power density for each wavelength range specified and the micromirror array temperature (T_ARRAY).

(19) To calculate, see Micromirror Power Density Calculation.