DLPU113A December 2021 – April 2022 DLP2021-Q1
The illumination subsystem includes the LED driver circuit and RGB LEDs or a White LED. The FPGA has three PWM outputs which typically correspond to red, green, and blue illumination colors. The PWM duty cycles can be adjusted to set a reference voltage to an external illumination driver circuit as needed to balance colors and adjust output brightness. Typical illumination configurations for the DLP2021Q1EVM:
Optimal Color for RGB: PWM=450 with duty cycles of Red=30%, Green=55%, Blue=15%
Single/Monochromatic: PWM=450 with duty cycles of Red=0%, Green=100%, Blue=0%
The PWM is a 10-bit value that is initialized to the Default Register Configuration value of DLP Composer, but can be modified in real-time during display operation. The duty cycle of each RGB can only be configured in DLP Composer as part of a list of Sequence Settings.