SBASBC4A December 2025 – June 2026 ADS8688W
PRODUCTION DATA
The devices support a hardware and software reset (RST) mode in which all program registers are reset to the default values. The devices can be put into RST mode using a hardware pin, as explained in the RST / PD (Input) section.
The device program registers can be reset to the default values during any data frame by executing a valid write operation on the command register with a RST command of 8500h, as shown in Figure 7-40. The device remains in RST mode if no valid conversion command (AUTO_RST or MAN_Ch_n) is executed and SDI remains low (see the Continued Operation in the Selected Mode (NO_OP) section) during the subsequent data frames. When the device operates in RST mode, the program register settings can be updated (as explained in the Program Register Read/Write Operation section) using 16 SCLK cycles. However, if 32 complete SCLK cycles are provided, then the device returns invalid data on the SDO line because there is no ongoing conversion in RST mode. The values of the program register can be read normally during this mode. A valid AUTO_RST or MAN_CH_n channel selection command must be executed for initiating a conversion on a particular analog channel using the default program register settings.
Figure 7-40 Reset Program Registers (RST) Timing Diagram