SBAU230C August   2014  – March 2021 ADS8688

 

  1. Trademarks
  2. ADS8688EVM-PDK Overview
  3. EVM Analog Interface
    1. 3.1 ADC Analog Input Connections and Filter
    2. 3.2 Voltage Reference, Aux Input, and Supply Decoupling
  4. Digital Interface
    1. 4.1 Serial Interface (SPI)
    2. 4.2 I2C Bus for Onboard EEPROM
  5. Power Supplies
  6. ADS8688 Initial Setup
    1. 6.1 Software Installation
  7. EVM Operation
    1. 7.1 Connecting the Hardware
    2. 7.2 Modifying Hardware and Using Software to Evaluate Other Devices in the Family
    3. 7.3 EVM GUI Global Settings for ADC Control
    4. 7.4 Time Domain Display
    5. 7.5 Frequency Domain Display
    6. 7.6 Histogram Display
  8. Bill of Materials, Schematics, and Layout
    1. 8.1 Bill of Materials
    2. 8.2 Board Layout
    3. 8.3 Schematic
  9. 10Revision History

Power Supplies

The PHI provides multiple power-supply options for the EVM, derived from the USB supply of the computer. The EEPROM on the ADS8688EVM uses a 3.3-V power supply generated directly by the PHI. The EVM_REG_5V5 is a 5.5V supply from the PHI and is applied to the input of a low dropout regulator (LDO) to generate AVDD on the EVM. The analog supply of the ADC (AVDD = 5.0V) is powered by the TPS7A4700RGWR (U3). The ADC Digital supply (DVDD = 3.3V), is generated by the PHI. Two LEDs are connected to the AVDD, and DVDD supplies. These LEDs will illuminate after the software GUI loads and the PHI turns on its output power supplies.

GUID-ED0A29EF-B330-40CA-89EB-BF875927230F-low.gifFigure 5-1 Power Supplies, Regulators, and Indicators