SBOA444 November   2020 TMCS1100

 

  1.   Trademarks
  2. 1Introduction
  3. 2Implementation Block Diagram
  4. 3Hardware Implemenation
    1. 3.1 Analog Inputs
      1. 3.1.1 Voltage Measurement Analog Front End
      2. 3.1.2 Current Measurement Analog Front End
    2. 3.2 MSP432 LaunchPad Connections
    3. 3.3 PCB Layout Recommendations
  5. 4How to Implement Software for Metrology Testing
    1. 4.1 Setup
      1. 4.1.1 Clock
      2. 4.1.2 UART Setup for GUI Communication
      3. 4.1.3 Real-Time Clock (RTC)
      4. 4.1.4 Direct Memory Access (DMA)
      5. 4.1.5 ADC Setup
    2. 4.2 Foreground Process
      1. 4.2.1 Formulas
        1. 4.2.1.1 Standard Metrology Parameters
        2. 4.2.1.2 Power Quality Formulas
    3. 4.3 Background Process
      1. 4.3.1 per_sample_dsp( )
        1. 4.3.1.1 Voltage and Current ADC Samples
        2. 4.3.1.2 Pure Waveform Samples
        3. 4.3.1.3 Frequency Measurement and Cycle Tracking
      2. 4.3.2 LED Pulse Generation
      3. 4.3.3 Phase Compensation
  6. 5Metrology Accuracy Testing
    1. 5.1 Test Setup
    2. 5.2 Results
  7. 6Schematics
  8. 7References

Background Process

The Voltage and Current Sampling Events figure shows the different events that occur when sampling voltage and current, where the items in olive green are done by the hardware settings and not the test software.

GUID-20201005-CA0I-PSMS-NB9T-SQHQ7CSWCL38-low.gif Figure 4-3 Voltage and Current Sampling Events.
To go over the process mentioned in the Voltage and Current Sampling Events figure, new current samples for each phase are ready every OSR, or 512 for this design, modulation clock cycles. Suppose the most recently ready phase current and voltage samples from the ADS131M08 device corresponds to the Nth – 1 current and voltage sample, or Iphx[N – 1] and Vphx[N – 1]. Once new samples are ready, the DRDY pin is asserted low by the ADS131M08. The falling edge on the DRDY pin on the ADS131M08 causes a GPIO port interrupt on the MSP432, which triggers the Port ISR on the MSP432. The background process is run within the Port ISR. The Background Process figure shows the background process, which mainly deals with timing critical events in the test software.

GUID-20201005-CA0I-DTMG-PFPN-8RMWZDGDNXSL-low.gif Figure 4-4 Background Process.
In the background process, the previously-obtained voltage samples (Vphx[N – 2]) and previously obtained current samples (Iphx[N – 2]) are stored so that they can be used later by the per_sample_dsp function, which is responsible for updating the intermediate dot product quantities used to calculate metrology parameters. After the previously-obtained voltage and current samples are stored, communication to the ADS131M08 is enabled by asserting the chip select signal low. The DMA is then configured to both send a request for the newest current and voltage samples (Iphx[N – 1] and Vphx[N – 1]) of the ADS131M08 device and also to receive the data packet response from the ADS131M08. The request and reception of the current samples is done automatically by the DMA module instead of it being done by the software.

The ADS131M08 ADC Sample Request Packet figure shows the packet that is transmitted by the DMA of the MSP432 MCU and the response packet from the ADS131M08 that is received and assembled by the DMA as well. The transmission and reception packets contain ten words, where each word is three bytes long.

GUID-20201005-CA0I-KZT8-DPZK-SLQDCPZZCNCK-low.gif Figure 4-5 ADS131M08 ADC Sample Request Packet.
When requesting the ADC data from the ADS131M08 device, the first word that has to be sent to the ADS131M08 is the command word. Since the test software does not need to change the settings of the ADS131M08 or read any registers during typical ADC sample readouts, a NULL command is sent to the ADS131M08, which allows you to get the ADC samples from the ADS131M08 without changing the state of the device. The actual size of the null command is 16-bits; however, since 24-bit words are used, the 16-bit command must be padded with an extra value of 0x00 at the end of the command. The NULL command word sent therefore has a value of 0x000000. While the MSP432 is shifting out the command word, the MSP432 is simultaneously shifting in the response word to the command word of the previous packet. The response word to a NULL command is the contents of the STATUS register. The contents of the STATUS register is not used in this design so the first word received from the ADS131M08 is ignored.

After writing the command word, it is necessary for a dummy write to be performed for each byte that is to be read. The dummy byte write is necessary to enable the SPI clock, which is necessary to read a byte from the ADS131M08 device. For each dummy byte write, a value of 0x00 is written to the SPI transmit register for EUSCIB0. Immediately after writing the command byte, writing three dummy bytes allows the MSP432 MCU to receive the 3-byte ADC value from channel 0 of the ADS131M08. Writing the next 21 dummy bytes gets the ADC data for channel 1–7. Finally, writing the next three dummy bytes gets the CRC word. The CRC word is 24-bits; however, note that the actual CRC is only 16-bits, which are placed in the most significant bits of the 24-bit word. As a result, when parsing the CRC word, the last byte is not needed (note though that the dummy write for this zero-padded byte must still be sent though for proper ADS131M08 operation).

In parallel to receiving the newest current samples from the ADS131M08 using the DMA, the ADS131M08 is currently sampling the next voltage (Vphx[N]) and current samples (Iphx[N]) and the test software also performs per-sample processing on the last voltage (Vphx[N – 2]) and current samples (Iphx[N – 2] ) obtained from the ADS131M08. This per-sample processing is used to update the intermediate dot product quantities that are used to calculate the metrology parameters. After sample processing, the background process uses the "per_sample_energy_pulse_processing" for the calculation and output of energy-proportional pulses. Once the per_sample_energy_pulse_processing is completed, the test software exits from the port ISR.