SCHS174D February   1998  – October 2025 CD54HC273 , CD54HCT273 , CD74HC273 , CD74HCT273

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3.   3
  4. 2 Applications
  5. 3 Description
  6. 4 Pin Configuration and Functions
  7. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Timing Requirements
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  8. 6 Parameter Measurement Information
  9.   16
  10. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS Push-Pull Outputs
      2. 7.3.2 Standard CMOS Inputs
      3. 7.3.3 TTL-Compatible CMOS Inputs
      4. 7.3.4 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  11. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  12. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  13. 10Revision History
  14. 11Mechanical, Packaging, and Orderable Information

10 Revision History

Changes from Revision C (January 2022) to Revision D (October 2025)

  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo
  • Added Applications, Application and Implementation, Typical Characteristics, and Typical Application Example sectionsGo
  • Updated Power Supply Recommendations Go
  • Updated Layout Guidelines Go
  • Moved Layout to Application and Implementation sectionGo
  • Added Pin Functions tableGo
  • Updated Pin Configuration figureGo
  • Updated from: Prerequisite for Switching Specifications to: Timing Requirements Go
  • Moved Detailed Description after Parameter Measurement Information Go
  • Added Feature Description Go
  • Moved Device Functional Modes after Feature Description Go

Changes from Revision B (May 2003) to Revision C (January 2022)

  • Updated the numbering, formatting, tables, figures, and cross-references throughout the document to reflect modern data sheet standardsGo
  • Updated pin names to match current TI naming conventions. MR is now CLR, Q0 is now 1Q, D0 is now 1D, D1 is now 2D, Q1 is now 2Q, Q2 is now 3Q, D2 is now 3Q, D3 is now 4D, Q3 is now 4Q, CP is now CLK, Q4 is now 5Q, D4 is now 5D, D5 is now D6, Q5 is now 6Q, Q6 is now 7Q, D6 is now 7D, D7 is now 8D, Q7 is now 8QGo