SDAA044 September   2025 AM623 , AM625 , AM62L

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Overview of AM62x vs AM62Lx
  6. 3 Power Architecture and PMIC Considerations
  7. 4 IO Voltage Domains and Signal Levels
    1. 4.1 Dual-Voltage vs. 1.8V-Only IO Banks
    2. 4.2 Buffer Types and Fail-Safe IOs
  8. 5 Peripheral Interface Changes
    1. 5.1 Memory Interfaces
    2. 5.2 Connectivity
    3. 5.3 Media and Display Interfaces
    4. 5.4 Analog and Other Interfaces
  9. 6 Boot Configuration and Reset Changes
  10. 7 Package and Layout Considerations
    1. 7.1 BGA Package Options
    2. 7.2 Thermal and Power Dissipation
  11. 8 Summary
  12. 9 Terminology and Acronyms
  13. 10References

9 Terminology and Acronyms

  • AAD-mux: Address-Address/Data multiplexed mode
  • ADC: Analog-to-Digital Converter
  • ALW: Package code for 13 × 13mm AM62x
  • AMC: Package code for 17.2 × 17.2mm AM62x
  • ANB: Package code for 11.9 × 11.9mm AM62Lx
  • BOM: Bill of Materials
  • BGA: Ball Grid Array
  • BSP: Board Support Package
  • CAN-FD: Controller Area Network with Flexible Data rate
  • °C/W: Degrees Celsius per Watt
  • CPU: Central Processing Unit
  • CS: Chip Select
  • DDR: Double Data Rate
  • DDR4: Fourth-generation Double Data Rate
  • DPI: Display Parallel Interface
  • DRD: Dual-Role Device
  • E2E: Engineer-to-Engineer (Texas Instruments support forum)
  • EEPROM: Electrically Erasable Programmable Read-Only Memory
  • ENOB: Effective Number of Bits
  • eFuse: Electronic Fuse
  • eMMC: Embedded MultimediaCard
  • EVM: Evaluation Module
  • EXTINTn: External Interrupt Pin
  • EXT_WAKEUP: External Wake-Up Pin
  • FAQ: Frequently Asked Question
  • FCBGA: Flip-Chip Ball Grid Array
  • GPMC: General Purpose Memory Controller
  • GPU: Graphics Processing Unit
  • GPIO: General Purpose Input/Output
  • HS200: High Speed 200 MB/s (for eMMC)
  • I2C: Inter-Integrated Circuit
  • ICSS: Industrial Communication Subsystem
  • IEEE: Institute of Electrical and Electronics Engineers
  • IO: Input/Output
  • JTAG: Joint Test Action Group
  • L1: Level 1 (cache)
  • L2: Level 2 (cache)
  • LDO: Low Drop-Out regulator
  • LPDDR4: Low Power Double Data Rate 4th generation
  • LVDS: Low Voltage Differential Signaling
  • MCU: Microcontroller Unit
  • McASP: Multi-Channel Audio Serial Port
  • MDIO: Management Data Input/Output
  • Processor Interface
  • MSPS: Million Samples Per Second
  • OLDI: Open LVDS Display Interface
  • OTP: One-Time Programmable
  • OSPI: Octal Serial Peripheral Interface
  • PMIC: Power Management Integrated Circuit
  • PORz: Power-On Reset
  • PRU: Programmable Realtime Unit
  • PRUSS: Programmable Real-time Unit Subsystem
  • PWM: Pulse Width Modulation
  • QSPI: Quad Serial Peripheral Interface
  • RGMII: Reduced Gigabit Media Independent Interface
  • RMII: Reduced Media Independent Interface
  • RTC: Real-Time Clock
  • SD: Secure Digital
  • SDIO: Secure Digital Input/Output
  • SMS: Security Management System
  • SoC: System on Chip
  • SPL: Secondary Program Loader
  • TRM: Technical Reference Manual
  • Tx: Transmit
  • UHS-I: Ultra High-Speed Phase I (SD bus mode)
  • UART: Universal Asynchronous Receiver/Transmitter
  • U-Boot: Universal Boot
  • USB: Universal Serial Bus
  • VBUS: Voltage Bus
  • VTM: Voltage and Thermal Manager
  • WKUP: Wakeup